From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
David Brazdil <dbrazdil@google.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Ard Biesheuvel <ardb@kernel.org>,
Jing Zhang <jingzhangos@google.com>,
Ajay Patil <pajay@qti.qualcomm.com>,
Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
kernel-team@android.com
Subject: [PATCH v6 01/21] arm64: Fix labels in el2_setup macros
Date: Mon, 1 Feb 2021 11:56:17 +0000 [thread overview]
Message-ID: <20210201115637.3123740-2-maz@kernel.org> (raw)
In-Reply-To: <20210201115637.3123740-1-maz@kernel.org>
If someone happens to write the following code:
b 1f
init_el2_state vhe
1:
[...]
they will be in for a long debugging session, as the label "1f"
will be resolved *inside* the init_el2_state macro instead of
after it. Not really what one expects.
Instead, rewite the EL2 setup macros to use unambiguous labels,
thanks to the usual macro counter trick.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
---
arch/arm64/include/asm/el2_setup.h | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index a7f5a1bbc8ac..540116de80bf 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -45,24 +45,24 @@
mrs x1, id_aa64dfr0_el1
sbfx x0, x1, #ID_AA64DFR0_PMUVER_SHIFT, #4
cmp x0, #1
- b.lt 1f // Skip if no PMU present
+ b.lt .Lskip_pmu_\@ // Skip if no PMU present
mrs x0, pmcr_el0 // Disable debug access traps
ubfx x0, x0, #11, #5 // to EL2 and allow access to
-1:
+.Lskip_pmu_\@:
csel x2, xzr, x0, lt // all PMU counters from EL1
/* Statistical profiling */
ubfx x0, x1, #ID_AA64DFR0_PMSVER_SHIFT, #4
- cbz x0, 3f // Skip if SPE not present
+ cbz x0, .Lskip_spe_\@ // Skip if SPE not present
.ifeqs "\mode", "nvhe"
mrs_s x0, SYS_PMBIDR_EL1 // If SPE available at EL2,
and x0, x0, #(1 << SYS_PMBIDR_EL1_P_SHIFT)
- cbnz x0, 2f // then permit sampling of physical
+ cbnz x0, .Lskip_spe_el2_\@ // then permit sampling of physical
mov x0, #(1 << SYS_PMSCR_EL2_PCT_SHIFT | \
1 << SYS_PMSCR_EL2_PA_SHIFT)
msr_s SYS_PMSCR_EL2, x0 // addresses and physical counter
-2:
+.Lskip_spe_el2_\@:
mov x0, #(MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT)
orr x2, x2, x0 // If we don't have VHE, then
// use EL1&0 translation.
@@ -71,7 +71,7 @@
// and disable access from EL1
.endif
-3:
+.Lskip_spe_\@:
msr mdcr_el2, x2 // Configure debug traps
.endm
@@ -79,9 +79,9 @@
.macro __init_el2_lor
mrs x1, id_aa64mmfr1_el1
ubfx x0, x1, #ID_AA64MMFR1_LOR_SHIFT, 4
- cbz x0, 1f
+ cbz x0, .Lskip_lor_\@
msr_s SYS_LORC_EL1, xzr
-1:
+.Lskip_lor_\@:
.endm
/* Stage-2 translation */
@@ -93,7 +93,7 @@
.macro __init_el2_gicv3
mrs x0, id_aa64pfr0_el1
ubfx x0, x0, #ID_AA64PFR0_GIC_SHIFT, #4
- cbz x0, 1f
+ cbz x0, .Lskip_gicv3_\@
mrs_s x0, SYS_ICC_SRE_EL2
orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1
@@ -103,7 +103,7 @@
mrs_s x0, SYS_ICC_SRE_EL2 // Read SRE back,
tbz x0, #0, 1f // and check that it sticks
msr_s SYS_ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults
-1:
+.Lskip_gicv3_\@:
.endm
.macro __init_el2_hstr
@@ -128,14 +128,14 @@
.macro __init_el2_nvhe_sve
mrs x1, id_aa64pfr0_el1
ubfx x1, x1, #ID_AA64PFR0_SVE_SHIFT, #4
- cbz x1, 1f
+ cbz x1, .Lskip_sve_\@
bic x0, x0, #CPTR_EL2_TZ // Also disable SVE traps
msr cptr_el2, x0 // Disable copro. traps to EL2
isb
mov x1, #ZCR_ELx_LEN_MASK // SVE: Enable full vector
msr_s SYS_ZCR_EL2, x1 // length for EL1.
-1:
+.Lskip_sve_\@:
.endm
.macro __init_el2_nvhe_prepare_eret
--
2.29.2
next prev parent reply other threads:[~2021-02-01 11:58 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-01 11:56 [PATCH v6 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-02-01 11:56 ` Marc Zyngier [this message]
2021-02-01 11:56 ` [PATCH v6 02/21] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 03/21] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 05/21] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-02-05 12:01 ` Hector Martin 'marcan'
2021-02-05 14:04 ` Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-02-03 21:13 ` Will Deacon
2021-02-04 9:30 ` Marc Zyngier
2021-02-04 9:34 ` Will Deacon
2021-02-04 9:50 ` Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 07/21] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 08/21] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 09/21] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 10/21] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 11/21] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 12/21] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-02-05 16:35 ` Will Deacon
2021-02-05 16:42 ` Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 14/21] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 15/21] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 16/21] arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 17/21] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 18/21] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 19/21] arm64: cpufeatures: Allow disabling of BTI from the command-line Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 20/21] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-02-01 11:56 ` [PATCH v6 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Marc Zyngier
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