From: Ikjoon Jang <ikjn@chromium.org>
To: devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org,
Rob Herring <robh+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Cc: Weiyi Lu <weiyi.lu@mediatek.com>, Ikjoon Jang <ikjn@chromium.org>
Subject: [PATCH] arm64: dts: mt8183: Add power-domains properity to mfgcfg
Date: Wed, 24 Feb 2021 17:17:42 +0800 [thread overview]
Message-ID: <20210224091742.1060508-1-ikjn@chromium.org> (raw)
mfgcfg clock is under MFG_ASYNC power domain
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Ikjoon Jang <ikjn@chromium.org>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 5b782a4769e7..3384df5284c0 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -962,6 +962,7 @@ mfgcfg: syscon@13000000 {
compatible = "mediatek,mt8183-mfgcfg", "syscon";
reg = <0 0x13000000 0 0x1000>;
#clock-cells = <1>;
+ power-domains = <&scpsys MT8183_POWER_DOMAIN_MFG_ASYNC>;
};
mmsys: syscon@14000000 {
--
2.30.0.617.g56c4b15f3c-goog
next reply other threads:[~2021-02-24 9:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-24 9:17 Ikjoon Jang [this message]
2021-02-24 10:30 ` [PATCH] arm64: dts: mt8183: Add power-domains properity to mfgcfg Enric Balletbo Serra
2021-04-01 9:38 ` Matthias Brugger
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