[V3,4/5] dt-bindings: mmc: fsl-imx-esdhc: add clock bindings
diff mbox series

Message ID 1614222604-27066-5-git-send-email-peng.fan@oss.nxp.com
State New, archived
Headers show
Series
  • imx esdhc dt/driver update
Related show

Commit Message

Peng Fan (OSS) Feb. 25, 2021, 3:10 a.m. UTC
From: Peng Fan <peng.fan@nxp.com>

Add clock bindings for fsl-imx-esdhc yaml

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Rob Herring March 4, 2021, 10:48 p.m. UTC | #1
On Wed, Feb 24, 2021 at 9:23 PM <peng.fan@oss.nxp.com> wrote:
>
> From: Peng Fan <peng.fan@nxp.com>
>
> Add clock bindings for fsl-imx-esdhc yaml
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Looks like this landed in linux-next and introduces warnings:

/builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.example.dt.yaml:
mmc@5b010000: clock-names:1: 'ahb' was expected
 From schema: /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
/builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.example.dt.yaml:
mmc@5b010000: clock-names:2: 'per' was expected
 From schema: /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
Peng Fan March 5, 2021, 12:38 a.m. UTC | #2
Hi Rob,

> Subject: Re: [PATCH V3 4/5] dt-bindings: mmc: fsl-imx-esdhc: add clock
> bindings
> 
> On Wed, Feb 24, 2021 at 9:23 PM <peng.fan@oss.nxp.com> wrote:
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Add clock bindings for fsl-imx-esdhc yaml
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11
> +++++++++++
> >  1 file changed, 11 insertions(+)
> 
> Looks like this landed in linux-next and introduces warnings:

Patch 2,3 has not been picked by Shawn. After patch 2, 3 picked up,
there will be no warnings.

Thanks,
Peng.

> 
> /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/clo
> ck/imx8qxp-lpcg.example.dt.yaml:
> mmc@5b010000: clock-names:1: 'ahb' was expected  From schema:
> /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/m
> mc/fsl-imx-esdhc.yaml
> /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/clo
> ck/imx8qxp-lpcg.example.dt.yaml:
> mmc@5b010000: clock-names:2: 'per' was expected  From schema:
> /builds/robherring/linux-dt-bindings/Documentation/devicetree/bindings/m
> mc/fsl-imx-esdhc.yaml
Dong Aisheng March 5, 2021, 2:09 p.m. UTC | #3
Hi Rob,

> From: Peng Fan (OSS) <peng.fan@oss.nxp.com>
> Sent: Thursday, February 25, 2021 11:10 AM
> 
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add clock bindings for fsl-imx-esdhc yaml
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> index a7fbd8cc1e38..369471814496 100644
> --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> @@ -103,6 +103,17 @@ properties:
>        Only eMMC HS400 mode need to take care of this property.
>      default: 0
> 
> +  clocks:
> +    maxItems: 3
> +    description:
> +      Handle clocks for the sdhc controller.
> +
> +  clock-names:
> +    items:
> +      - const: ipg
> +      - const: ahb
> +      - const: per

One question:
The side effect of this patch is that it imposes a forced order of clk names
In DT which actually was not needed.

Do we really have to do that?

Or any other better approach to allow a random order to match the DT
usage better?

Regards
Aisheng

> +
>    pinctrl-names:
>      minItems: 1
>      maxItems: 4
> --
> 2.30.0
Rob Herring March 5, 2021, 2:14 p.m. UTC | #4
On Fri, Mar 5, 2021 at 8:09 AM Aisheng Dong <aisheng.dong@nxp.com> wrote:
>
> Hi Rob,
>
> > From: Peng Fan (OSS) <peng.fan@oss.nxp.com>
> > Sent: Thursday, February 25, 2021 11:10 AM
> >
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Add clock bindings for fsl-imx-esdhc yaml
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > index a7fbd8cc1e38..369471814496 100644
> > --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > @@ -103,6 +103,17 @@ properties:
> >        Only eMMC HS400 mode need to take care of this property.
> >      default: 0
> >
> > +  clocks:
> > +    maxItems: 3
> > +    description:
> > +      Handle clocks for the sdhc controller.
> > +
> > +  clock-names:
> > +    items:
> > +      - const: ipg
> > +      - const: ahb
> > +      - const: per
>
> One question:
> The side effect of this patch is that it imposes a forced order of clk names
> In DT which actually was not needed.
>
> Do we really have to do that?

Yes.

> Or any other better approach to allow a random order to match the DT
> usage better?

Why do you need random order?

We can not enforce the order, but we only do that when there's
multiple optional entries.

Rob
Dong Aisheng March 6, 2021, 4:53 a.m. UTC | #5
> From: Rob Herring <robh+dt@kernel.org>
> Sent: Friday, March 5, 2021 10:14 PM
> 
> On Fri, Mar 5, 2021 at 8:09 AM Aisheng Dong <aisheng.dong@nxp.com>
> wrote:
> >
> > Hi Rob,
> >
> > > From: Peng Fan (OSS) <peng.fan@oss.nxp.com>
> > > Sent: Thursday, February 25, 2021 11:10 AM
> > >
> > > From: Peng Fan <peng.fan@nxp.com>
> > >
> > > Add clock bindings for fsl-imx-esdhc yaml
> > >
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > ---
> > >  .../devicetree/bindings/mmc/fsl-imx-esdhc.yaml        | 11
> +++++++++++
> > >  1 file changed, 11 insertions(+)
> > >
> > > diff --git
> > > a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > > b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > > index a7fbd8cc1e38..369471814496 100644
> > > --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > > +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
> > > @@ -103,6 +103,17 @@ properties:
> > >        Only eMMC HS400 mode need to take care of this property.
> > >      default: 0
> > >
> > > +  clocks:
> > > +    maxItems: 3
> > > +    description:
> > > +      Handle clocks for the sdhc controller.
> > > +
> > > +  clock-names:
> > > +    items:
> > > +      - const: ipg
> > > +      - const: ahb
> > > +      - const: per
> >
> > One question:
> > The side effect of this patch is that it imposes a forced order of clk
> > names In DT which actually was not needed.
> >
> > Do we really have to do that?
> 
> Yes.
> 
> > Or any other better approach to allow a random order to match the DT
> > usage better?
> 
> Why do you need random order?
> 

Thanks for the feedback.
I thought the DT itself supports the random order of strings/names in
a property and the OF API in kernel can also handle the random name order properly.
That means DT binding don't enforce the order of names when people writing DTS.
e.g.
Order1: clock-names = "ipg", "per", "ahb"
can function the same as:
Order2: clock-names = "ipg", "ahb", "per";

However, the schema in this patch enforced the name order which caused dt binding check fail.
https://lore.kernel.org/linux-arm-kernel/CAL_JsqKAOUKnVLvu-VNeDVg0ShXPy56wxhCQv38+rO2k961v+g@mail.gmail.com/#t

And this seems like a common issue in kernel DT because DT supports random name order before.
If we have to fix it, should we need fix them all in kernel?

And finally, If all the names property are fixed by dt schema definition, the driver
may also work without it by using index.

> We can not enforce the order, but we only do that when there's multiple
> optional entries.

Understood, probably this is the simplest way to do a accurate DT schema checking.

Regards
Aisheng

> 
> Rob

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
index a7fbd8cc1e38..369471814496 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
+++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml
@@ -103,6 +103,17 @@  properties:
       Only eMMC HS400 mode need to take care of this property.
     default: 0
 
+  clocks:
+    maxItems: 3
+    description:
+      Handle clocks for the sdhc controller.
+
+  clock-names:
+    items:
+      - const: ipg
+      - const: ahb
+      - const: per
+
   pinctrl-names:
     minItems: 1
     maxItems: 4