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From: Konrad Dybcio <konrad.dybcio@somainline.org>
To: phone-devel@vger.kernel.org
Cc: ~postmarketos/upstreaming@lists.sr.ht,
	martin.botka@somainline.org,
	angelogioacchino.delregno@somainline.org,
	marijn.suijten@somainline.org,
	Konrad Dybcio <konrad.dybcio@somainline.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Amit Kucheria <amitk@kernel.org>, Zhang Rui <rui.zhang@intel.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 28/41] arm64: dts: qcom: sdm630: Configure the camera subsystem
Date: Fri, 26 Feb 2021 21:03:58 +0100	[thread overview]
Message-ID: <20210226200414.167762-29-konrad.dybcio@somainline.org> (raw)
In-Reply-To: <20210226200414.167762-1-konrad.dybcio@somainline.org>

From: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>

Add nodes for camss, cci and its pinctrl in order to bring up
camera functionality.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 215 +++++++++++++++++++++++++++
 1 file changed, 215 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index c74423474884..a5a06afc2c94 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1035,6 +1035,32 @@ i2c8_sleep: i2c8-sleep {
 				bias-pull-up;
 			};
 
+			cci0_default: cci0_default {
+				pinmux {
+					pins = "gpio36","gpio37";
+					function = "cci_i2c";
+				};
+
+				pinconf {
+					pins = "gpio36","gpio37";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+			};
+
+			cci1_default: cci1_default {
+				pinmux {
+					pins = "gpio38","gpio39";
+					function = "cci_i2c";
+				};
+
+				pinconf {
+					pins = "gpio38","gpio39";
+					bias-pull-up;
+					drive-strength = <2>;
+				};
+			};
+
 			sdc1_state_on: sdc1-on {
 				pinconf-clk {
 					pins = "sdc1_clk";
@@ -1941,6 +1967,195 @@ pil-reloc@94c {
 			};
 		};
 
+		camss: camss@ca00000 {
+			compatible = "qcom,sdm660-camss";
+			reg = <0x0c824000 0x1000>,
+			      <0x0ca00120 0x4>,
+			      <0x0c825000 0x1000>,
+			      <0x0ca00124 0x4>,
+			      <0x0c826000 0x1000>,
+			      <0x0ca00128 0x4>,
+			      <0x0ca30000 0x100>,
+			      <0x0ca30400 0x100>,
+			      <0x0ca30800 0x100>,
+			      <0x0ca30c00 0x100>,
+			      <0x0ca31000 0x500>,
+			      <0x0ca00020 0x10>,
+			      <0x0ca10000 0x1000>,
+			      <0x0ca14000 0x1000>;
+			reg-names = "csiphy0",
+				    "csiphy0_clk_mux",
+				    "csiphy1",
+				    "csiphy1_clk_mux",
+				    "csiphy2",
+				    "csiphy2_clk_mux",
+				    "csid0",
+				    "csid1",
+				    "csid2",
+				    "csid3",
+				    "ispif",
+				    "csi_clk_mux",
+				    "vfe0",
+				    "vfe1";
+			interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
+				     <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "csiphy0",
+					  "csiphy1",
+					  "csiphy2",
+					  "csid0",
+					  "csid1",
+					  "csid2",
+					  "csid3",
+					  "ispif",
+					  "vfe0",
+					  "vfe1";
+			clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
+				<&mmcc THROTTLE_CAMSS_AXI_CLK>,
+				<&mmcc CAMSS_ISPIF_AHB_CLK>,
+				<&mmcc CAMSS_CSI0PHYTIMER_CLK>,
+				<&mmcc CAMSS_CSI1PHYTIMER_CLK>,
+				<&mmcc CAMSS_CSI2PHYTIMER_CLK>,
+				<&mmcc CAMSS_CSI0_AHB_CLK>,
+				<&mmcc CAMSS_CSI0_CLK>,
+				<&mmcc CAMSS_CPHY_CSID0_CLK>,
+				<&mmcc CAMSS_CSI0PIX_CLK>,
+				<&mmcc CAMSS_CSI0RDI_CLK>,
+				<&mmcc CAMSS_CSI1_AHB_CLK>,
+				<&mmcc CAMSS_CSI1_CLK>,
+				<&mmcc CAMSS_CPHY_CSID1_CLK>,
+				<&mmcc CAMSS_CSI1PIX_CLK>,
+				<&mmcc CAMSS_CSI1RDI_CLK>,
+				<&mmcc CAMSS_CSI2_AHB_CLK>,
+				<&mmcc CAMSS_CSI2_CLK>,
+				<&mmcc CAMSS_CPHY_CSID2_CLK>,
+				<&mmcc CAMSS_CSI2PIX_CLK>,
+				<&mmcc CAMSS_CSI2RDI_CLK>,
+				<&mmcc CAMSS_CSI3_AHB_CLK>,
+				<&mmcc CAMSS_CSI3_CLK>,
+				<&mmcc CAMSS_CPHY_CSID3_CLK>,
+				<&mmcc CAMSS_CSI3PIX_CLK>,
+				<&mmcc CAMSS_CSI3RDI_CLK>,
+				<&mmcc CAMSS_AHB_CLK>,
+				<&mmcc CAMSS_VFE0_CLK>,
+				<&mmcc CAMSS_CSI_VFE0_CLK>,
+				<&mmcc CAMSS_VFE0_AHB_CLK>,
+				<&mmcc CAMSS_VFE0_STREAM_CLK>,
+				<&mmcc CAMSS_VFE1_CLK>,
+				<&mmcc CAMSS_CSI_VFE1_CLK>,
+				<&mmcc CAMSS_VFE1_AHB_CLK>,
+				<&mmcc CAMSS_VFE1_STREAM_CLK>,
+				<&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
+				<&mmcc CAMSS_VFE_VBIF_AXI_CLK>,
+				<&mmcc CSIPHY_AHB2CRIF_CLK>,
+				<&mmcc CAMSS_CPHY_CSID0_CLK>,
+				<&mmcc CAMSS_CPHY_CSID1_CLK>,
+				<&mmcc CAMSS_CPHY_CSID2_CLK>,
+				<&mmcc CAMSS_CPHY_CSID3_CLK>;
+			clock-names = "top_ahb",
+				"throttle_axi",
+				"ispif_ahb",
+				"csiphy0_timer",
+				"csiphy1_timer",
+				"csiphy2_timer",
+				"csi0_ahb",
+				"csi0",
+				"csi0_phy",
+				"csi0_pix",
+				"csi0_rdi",
+				"csi1_ahb",
+				"csi1",
+				"csi1_phy",
+				"csi1_pix",
+				"csi1_rdi",
+				"csi2_ahb",
+				"csi2",
+				"csi2_phy",
+				"csi2_pix",
+				"csi2_rdi",
+				"csi3_ahb",
+				"csi3",
+				"csi3_phy",
+				"csi3_pix",
+				"csi3_rdi",
+				"ahb",
+				"vfe0",
+				"csi_vfe0",
+				"vfe0_ahb",
+				"vfe0_stream",
+				"vfe1",
+				"csi_vfe1",
+				"vfe1_ahb",
+				"vfe1_stream",
+				"vfe_ahb",
+				"vfe_axi",
+				"csiphy_ahb2crif",
+				"cphy_csid0",
+				"cphy_csid1",
+				"cphy_csid2",
+				"cphy_csid3";
+			interconnects = <&mnoc 5 &bimc 5>;
+			interconnect-names = "vfe-mem";
+			iommus = <&mmss_smmu 0xc00>,
+				 <&mmss_smmu 0xc01>,
+				 <&mmss_smmu 0xc02>,
+				 <&mmss_smmu 0xc03>;
+			power-domains = <&mmcc CAMSS_VFE0_GDSC>,
+					<&mmcc CAMSS_VFE1_GDSC>;
+			status = "disabled";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
+		cci: cci@ca0c000 {
+			compatible = "qcom,msm8996-cci";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x0ca0c000 0x1000>;
+			interrupts = <GIC_SPI 295 IRQ_TYPE_EDGE_RISING>;
+
+			assigned-clocks = <&mmcc CAMSS_CCI_AHB_CLK>,
+					  <&mmcc CAMSS_CCI_CLK>;
+			assigned-clock-rates = <80800000>, <37500000>;
+			clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
+				 <&mmcc CAMSS_CCI_AHB_CLK>,
+				 <&mmcc CAMSS_CCI_CLK>,
+				 <&mmcc CAMSS_AHB_CLK>;
+			clock-names = "camss_top_ahb",
+				      "cci_ahb",
+				      "cci",
+				      "camss_ahb";
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&cci0_default &cci1_default>;
+			power-domains = <&mmcc CAMSS_TOP_GDSC>;
+			status = "disabled";
+
+			cci_i2c0: i2c-bus@0 {
+				reg = <0>;
+				clock-frequency = <400000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			cci_i2c1: i2c-bus@1 {
+				reg = <1>;
+				clock-frequency = <400000>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
 		mmss_smmu: iommu@cd00000 {
 			compatible = "qcom,sdm630-smmu-v2", "qcom,smmu-v2";
 			reg = <0x0cd00000 0x40000>;
-- 
2.30.1


  parent reply	other threads:[~2021-02-26 20:31 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-26 20:03 [PATCH 00/41] SDM630/636/660/Nile&Ganges DT feature enablement Konrad Dybcio
2021-02-26 20:03 ` [PATCH 01/41] arm64: dts: qcom: sdm630: Rewrite memory map Konrad Dybcio
2021-02-26 20:03 ` [PATCH 02/41] arm64: dts: qcom: sdm630: Add RPMPD nodes Konrad Dybcio
2021-02-26 20:03 ` [PATCH 03/41] arm64: dts: qcom: sdm630: Add MMCC node Konrad Dybcio
2021-02-26 20:03 ` [PATCH 04/41] arm64: dts: qcom: sdm630: Add interconnect provider nodes Konrad Dybcio
2021-02-26 20:03 ` [PATCH 05/41] arm64: dts: qcom: sdm630: Add MDSS nodes Konrad Dybcio
2021-02-26 20:03 ` [PATCH 06/41] arm64: dts: qcom: sdm630: Fix intc reg indentation Konrad Dybcio
2021-02-26 20:19   ` Konrad Dybcio
2021-02-26 20:03 ` [PATCH 07/41] arm64: dts: qcom: sdm630: Add qfprom subnodes Konrad Dybcio
2021-02-26 20:03 ` [PATCH 08/41] arm64: dts: qcom: sdm630: Add USB configuration Konrad Dybcio
2021-02-26 20:03 ` [PATCH 09/41] arm64: dts: qcom: sdm630: Fix TLMM node and pinctrl configuration Konrad Dybcio
2021-02-26 20:03 ` [PATCH 10/41] arm64: dts: qcom: sdm630: Add SDHCI2 node Konrad Dybcio
2021-02-26 20:03 ` [PATCH 11/41] arm64: dts: qcom: sdm630: Add interconnect and opp table to sdhc_1 Konrad Dybcio
2021-02-26 20:03 ` [PATCH 12/41] arm64: dts: qcom: sdm630: Add GPU Clock Controller node Konrad Dybcio
2021-02-26 20:03 ` [PATCH 13/41] arm64: dts: qcom: sdm630: Add clocks and power domains to SMMU nodes Konrad Dybcio
2021-02-26 20:03 ` [PATCH 14/41] arm64: dts: qcom: sdm630: Add qcom,adreno-smmu compatible Konrad Dybcio
2021-02-26 20:03 ` [PATCH 15/41] arm64: dts: qcom: sdm630: Add TSENS node Konrad Dybcio
2021-03-08 17:23   ` Rob Herring
2021-02-26 20:03 ` [PATCH 16/41] arm64: dts: qcom: sdm630: Add modem/ADSP SMP2P nodes Konrad Dybcio
2021-02-26 20:03 ` [PATCH 17/41] arm64: dts: qcom: sdm630: Add thermal-zones configuration Konrad Dybcio
2021-02-26 20:03 ` [PATCH 18/41] arm64: dts: qcom: sdm630: Add ADSP remoteproc configuration Konrad Dybcio
2021-02-26 20:03 ` [PATCH 19/41] arm64: dts: qcom: sdm630: Raise tcsr_mutex_regs size Konrad Dybcio
2021-02-26 20:03 ` [PATCH 20/41] arm64: dts: qcom: sdm630: Add Adreno 508 GPU configuration Konrad Dybcio
2021-02-26 21:09   ` Konrad Dybcio
2021-02-26 20:03 ` [PATCH 21/41] arm64: dts: qcom: pm660: Support SPMI regulators on PMIC sid 1 Konrad Dybcio
2021-02-26 20:03 ` [PATCH 22/41] arm64: dts: qcom: pm660l: Add WLED support Konrad Dybcio
2021-02-26 20:03 ` [PATCH 23/41] arm64: dts: qcom: pm660l: Support SPMI regulators on PMIC sid 3 Konrad Dybcio
2021-02-26 20:03 ` [PATCH 24/41] arm64: dts: qcom: pm660(l): Add VADC and temp alarm nodes Konrad Dybcio
2021-02-26 20:03 ` [PATCH 25/41] arm64: dts: qcom: sdm660: Make the DTS an overlay on top of 630 Konrad Dybcio
2021-02-26 21:08   ` Konrad Dybcio
2021-02-26 20:03 ` [PATCH 26/41] arm64: dts: qcom: Add device tree for SDM636 Konrad Dybcio
2021-02-26 21:08   ` Konrad Dybcio
2021-02-26 20:03 ` [PATCH 27/41] arm64: dts: qcom: sdm630: Add IMEM node Konrad Dybcio
2021-02-26 20:03 ` Konrad Dybcio [this message]
2021-02-26 20:03 ` [PATCH 29/41] arm64: dts: qcom: sdm660: Add required nodes for DSI1 Konrad Dybcio
2021-02-26 20:04 ` [PATCH 30/41] arm64: dts: qcom: sdm630-xperia-nile: Add all RPM and fixed regulators Konrad Dybcio
2021-02-26 20:04 ` [PATCH 31/41] arm64: dts: qcom: sdm630-nile: Use &labels Konrad Dybcio
2021-02-26 20:04 ` [PATCH 32/41] arm64: dts: qcom: sdm630-nile: Add USB Konrad Dybcio
2021-02-26 20:04 ` [PATCH 33/41] arm64: dts: qcom: sdm630-nile: Add Volume up key Konrad Dybcio
2021-02-26 20:04 ` [PATCH 34/41] arm64: dts: qcom: sdm630-nile: Configure WCN3990 Bluetooth Konrad Dybcio
2021-02-27 10:40   ` Konrad Dybcio
2021-02-27 11:02     ` Martin Botka
2021-03-08 23:07     ` Bjorn Andersson
2021-02-26 20:04 ` [PATCH 35/41] arm64: dts: qcom: sdm630-xperia: Retire sdm630-sony-xperia-ganges.dtsi Konrad Dybcio
2021-02-26 20:04 ` [PATCH 36/41] arm64: dts: qcom: sdm630-nile: Add Synaptics touchscreen Konrad Dybcio
2021-02-26 20:04 ` [PATCH 37/41] arm64: dts: qcom: sdm630-nile: Specify ADSP firmware name Konrad Dybcio
2021-02-26 20:04 ` [PATCH 38/41] arm64: dts: qcom: sdm630-nile: Enable uSD card slot Konrad Dybcio
2021-02-26 20:04 ` [PATCH 39/41] arm64: dts: qcom: sdm630-nile: Remove gpio-keys autorepeat Konrad Dybcio
2021-02-26 20:04 ` [PATCH 40/41] arm64: dts: qcom: sdm630: Add I2C functions to I2C pins Konrad Dybcio
2021-02-26 20:04 ` [PATCH 41/41] arm64: dts: qcom: sdm630: Add DMA to I2C hosts Konrad Dybcio

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