[PATCH v1 3/5] dt-bindings: arm: Add cpu-idle-states to Tegra194 CPU nodes

From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<skomatineni@nvidia.com>, <daniel.lezcano@linaro.org>,
	<robh+dt@kernel.org>
Cc: <ksitaraman@nvidia.com>, <sanjayc@nvidia.com>,
	<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v1 3/5] dt-bindings: arm: Add cpu-idle-states to Tegra194 CPU nodes
Date: Wed, 3 Mar 2021 22:08:10 -0800	[thread overview]
Message-ID: <1614838092-30398-4-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1614838092-30398-1-git-send-email-skomatineni@nvidia.com>

This patch adds cpu-idle-states and corresponding state nodes to
Tegra194 CPU in dt-binding document

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 .../bindings/arm/nvidia,tegra194-ccplex.yaml       | 53 ++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
index c9675c4..e1a5005 100644
--- a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
+++ b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml
@@ -30,6 +30,36 @@ properties:
       Specifies the bpmp node that needs to be queried to get
       operating point data for all CPUs.
 
+  cluster-deepest-power-state:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: CPU cluster deepest power state ID.
+
+patternProperties:
+  "^[a-z0-9]+$":
+    type: object
+    description: |
+      CPU core idle state nodes.
+      Refer to Documentation/devicetree/bindings/arm/idle-states.yaml
+
+    properties:
+      compatible:
+        enum:
+          - nvidia,tegra194-cpuidle-core
+
+  cpu_crossover_thresholds:
+    type: object
+    description: CPU idle states crossover threshold time in uSec.
+
+    patternProperties:
+      "^[a-z0-9]+$":
+        type: object
+
+        properties:
+          crossover_c1_c6:
+            $ref: /schemas/types.yaml#/definitions/uint32
+          crossover_cc1_cc6:
+            $ref: /schemas/types.yaml#/definitions/uint32
+
 additionalProperties: true
 
 examples:
@@ -39,12 +69,14 @@ examples:
       nvidia,bpmp = <&bpmp>;
       #address-cells = <1>;
       #size-cells = <0>;
+      cluster-deepest-power-state = <0x6>;
 
       cpu0_0: cpu@0 {
         compatible = "nvidia,tegra194-carmel";
         device_type = "cpu";
         reg = <0x0>;
         enable-method = "psci";
+        cpu-idle-states = <&C6>;
       };
 
       cpu0_1: cpu@1 {
@@ -52,6 +84,7 @@ examples:
         device_type = "cpu";
         reg = <0x001>;
         enable-method = "psci";
+        cpu-idle-states = <&C6>;
       };
 
       cpu1_0: cpu@100 {
@@ -59,6 +92,7 @@ examples:
         device_type = "cpu";
         reg = <0x100>;
         enable-method = "psci";
+        cpu-idle-states = <&C6>;
       };
 
       cpu1_1: cpu@101 {
@@ -66,6 +100,25 @@ examples:
         device_type = "cpu";
         reg = <0x101>;
         enable-method = "psci";
+        cpu-idle-states = <&C6>;
+      };
+
+      cpu_core_power_states {
+       C6: c6 {
+         compatible = "nvidia,tegra194-cpuidle-core";
+         idle-state-name = "CPU powergated, state retained";
+         wakeup-latency-us = <2000>;
+         min-residency-us = <30000>;
+         arm,psci-suspend-param = <0x6>;
+         status = "okay";
+       };
+     };
+
+     cpu_crossover_thresholds {
+      thresholds {
+        crossover_c1_c6         = <30000>;
+        crossover_cc1_cc6       = <80000>;
       };
+     };
     };
 ...
-- 
2.7.4

