From: Vaibhav Gupta <vaibhavgupta40@gmail.com>
To: Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
Rob Herring <robh+dt@kernel.org>
Cc: Kishon Vijay Abraham <kishon@ti.com>,
Sekhar Nori <nsekhar@ti.com>, Lokesh Vutla <lokeshvutla@ti.com>,
Praneeth Bajjuri <praneeth@ti.com>,
Gowtham Tammana <g-tammana@ti.com>,
linux-crypto@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Peter Ujfalusi <peter.ujfalusi@ti.com>,
Vaibhav Gupta <v_gupta@ti.com>
Subject: [PATCH v1 1/3] dt-bindings: crypto: ti,sa2ul: Add new compatible for AM64
Date: Tue, 9 Mar 2021 01:50:03 +0530 [thread overview]
Message-ID: <20210308202005.243228-2-vaibhavgupta40@gmail.com> (raw)
In-Reply-To: <20210308202005.243228-1-vaibhavgupta40@gmail.com>
From: Peter Ujfalusi <peter.ujfalusi@ti.com>
Add the AM64 version of sa2ul to the compatible list.
[v_gupta@ti.com: Conditional dma-coherent requirement, clocks]
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vaibhav Gupta <v_gupta@ti.com>
---
.../devicetree/bindings/crypto/ti,sa2ul.yaml | 40 +++++++++++++++----
1 file changed, 33 insertions(+), 7 deletions(-)
diff --git a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
index 1d48ac712b23..6eb9acd564c2 100644
--- a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
+++ b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
@@ -14,6 +14,7 @@ properties:
enum:
- ti,j721e-sa2ul
- ti,am654-sa2ul
+ - ti,am64-sa2ul
reg:
maxItems: 1
@@ -45,19 +46,44 @@ properties:
description:
Address translation for the possible RNG child node for SA2UL
+ clocks:
+ items:
+ - description: Clock used by PKA
+ - description: Main Input Clock
+ - description: Clock used by rng
+
+ clock-names:
+ items:
+ - const: pka_in_clk
+ - const: x1_clk
+ - const: x2_clk
+
patternProperties:
"^rng@[a-f0-9]+$":
type: object
description:
Child RNG node for SA2UL
-required:
- - compatible
- - reg
- - power-domains
- - dmas
- - dma-names
- - dma-coherent
+if:
+ properties:
+ compatible:
+ const: ti,am64-sa2ul
+then:
+ required:
+ - compatible
+ - reg
+ - power-domains
+ - dmas
+ - dma-names
+
+else:
+ required:
+ - compatible
+ - reg
+ - power-domains
+ - dmas
+ - dma-names
+ - dma-coherent
additionalProperties: false
--
2.30.1
next prev parent reply other threads:[~2021-03-08 20:24 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-08 20:20 [PATCH v1 0/3] Update dt-bindings and sa2ul driver for AM64x SoCs Vaibhav Gupta
2021-03-08 20:20 ` Vaibhav Gupta [this message]
2021-03-16 22:05 ` [PATCH v1 1/3] dt-bindings: crypto: ti,sa2ul: Add new compatible for AM64 Rob Herring
2021-03-17 4:16 ` Vaibhav Gupta
2021-04-13 9:15 ` [PATCH v2 0/3] Update dt-bindings and sa2ul driver for AM64x SoCs Vaibhav Gupta
2021-04-13 9:15 ` [PATCH v2 1/3] dt-bindings: crypto: ti,sa2ul: Add new compatible for AM64 Vaibhav Gupta
2021-04-13 16:30 ` Rob Herring
2021-04-13 9:15 ` [PATCH v2 2/3] crypto: sa2ul: Support for per channel coherency Vaibhav Gupta
2021-04-13 9:15 ` [PATCH v2 3/3] crypto: sa2ul: Add support for AM64 Vaibhav Gupta
2021-04-22 7:45 ` [PATCH v2 0/3] Update dt-bindings and sa2ul driver for AM64x SoCs Herbert Xu
2021-03-08 20:20 ` [PATCH v1 2/3] crypto: sa2ul: Support for per channel coherency Vaibhav Gupta
2021-03-08 20:20 ` [PATCH v1 3/3] crypto: sa2ul: Add support for AM64 Vaibhav Gupta
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