From: Bhaumik Bhatt <bbhatt@codeaurora.org>
To: manivannan.sadhasivam@linaro.org
Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org,
jhugo@codeaurora.org, linux-kernel@vger.kernel.org,
carl.yin@quectel.com, naveen.kumar@quectel.com,
loic.poulain@linaro.org, Bhaumik Bhatt <bbhatt@codeaurora.org>
Subject: [PATCH v5 1/2] bus: mhi: core: Introduce internal register poll helper function
Date: Mon, 29 Mar 2021 12:53:02 -0700 [thread overview]
Message-ID: <1617047583-12104-2-git-send-email-bbhatt@codeaurora.org> (raw)
In-Reply-To: <1617047583-12104-1-git-send-email-bbhatt@codeaurora.org>
Introduce helper function to allow MHI core driver to poll for
a value in a register field. This helps reach a common path to
read and poll register values along with a retry time interval.
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
---
drivers/bus/mhi/core/internal.h | 3 +++
drivers/bus/mhi/core/main.c | 23 +++++++++++++++++++++++
2 files changed, 26 insertions(+)
diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h
index 6f80ec3..005286b 100644
--- a/drivers/bus/mhi/core/internal.h
+++ b/drivers/bus/mhi/core/internal.h
@@ -643,6 +643,9 @@ int __must_check mhi_read_reg(struct mhi_controller *mhi_cntrl,
int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl,
void __iomem *base, u32 offset, u32 mask,
u32 shift, u32 *out);
+int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl,
+ void __iomem *base, u32 offset, u32 mask,
+ u32 shift, u32 val, u32 delayus);
void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base,
u32 offset, u32 val);
void mhi_write_reg_field(struct mhi_controller *mhi_cntrl, void __iomem *base,
diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c
index 4e0131b..6f4b630 100644
--- a/drivers/bus/mhi/core/main.c
+++ b/drivers/bus/mhi/core/main.c
@@ -4,6 +4,7 @@
*
*/
+#include <linux/delay.h>
#include <linux/device.h>
#include <linux/dma-direction.h>
#include <linux/dma-mapping.h>
@@ -37,6 +38,28 @@ int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl,
return 0;
}
+int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl,
+ void __iomem *base, u32 offset,
+ u32 mask, u32 shift, u32 val, u32 delayus)
+{
+ int ret;
+ u32 out, retry = (mhi_cntrl->timeout_ms * 1000) / delayus;
+
+ while (retry--) {
+ ret = mhi_read_reg_field(mhi_cntrl, base, offset, mask, shift,
+ &out);
+ if (ret)
+ return ret;
+
+ if (out == val)
+ return 0;
+
+ fsleep(delayus);
+ }
+
+ return -ENOENT;
+}
+
void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base,
u32 offset, u32 val)
{
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2021-03-29 19:54 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-29 19:53 [PATCH v5 0/2] Polling for MHI ready Bhaumik Bhatt
2021-03-29 19:53 ` Bhaumik Bhatt [this message]
2021-03-31 13:03 ` [PATCH v5 1/2] bus: mhi: core: Introduce internal register poll helper function Manivannan Sadhasivam
2021-03-31 17:09 ` Bhaumik Bhatt
2021-03-29 19:53 ` [PATCH v5 2/2] bus: mhi: core: Move to polling method to wait for MHI ready Bhaumik Bhatt
2021-03-31 13:04 ` Manivannan Sadhasivam
2021-03-31 17:23 ` Bhaumik Bhatt
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