[v2] crypto: hisilicon/sec - Fix a module parameter error
diff mbox series

Message ID 1617091352-52938-1-git-send-email-liulongfang@huawei.com
State Accepted
Commit da6503f52bf85a7da29fbd7126320658f906dd9a
Headers show
Series
  • [v2] crypto: hisilicon/sec - Fix a module parameter error
Related show

Commit Message

liulongfang March 30, 2021, 8:02 a.m. UTC
ctx_q_num is a module parameter set by the user to specify the
number of qp queues required to create a ctx.

When the number of qp queues allocated by PF or VF is less than
the ctx_q_num, an error will be reported when ctx is initialized
in kernel mode, which leads to the problem that the registered
algorithms cannot be used.

Therefore, when PF or VF is initialized, if the number of qp queues
is not enough to create a ctx, the kernel mode cannot be used,
and there is no need to register the kernel mode algorithms.

Signed-off-by: Longfang Liu <liulongfang@huawei.com>
---

Changes in V2:
 - Add algorithms unregistration processing

 drivers/crypto/hisilicon/sec2/sec_main.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

Comments

Herbert Xu April 9, 2021, 7:51 a.m. UTC | #1
On Tue, Mar 30, 2021 at 04:02:32PM +0800, Longfang Liu wrote:
> ctx_q_num is a module parameter set by the user to specify the
> number of qp queues required to create a ctx.
> 
> When the number of qp queues allocated by PF or VF is less than
> the ctx_q_num, an error will be reported when ctx is initialized
> in kernel mode, which leads to the problem that the registered
> algorithms cannot be used.
> 
> Therefore, when PF or VF is initialized, if the number of qp queues
> is not enough to create a ctx, the kernel mode cannot be used,
> and there is no need to register the kernel mode algorithms.
> 
> Signed-off-by: Longfang Liu <liulongfang@huawei.com>
> ---
> 
> Changes in V2:
>  - Add algorithms unregistration processing
> 
>  drivers/crypto/hisilicon/sec2/sec_main.c | 17 ++++++++++++-----
>  1 file changed, 12 insertions(+), 5 deletions(-)

Patch applied.  Thanks.

Patch
diff mbox series

diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index b1818f7..8e2e2b1 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -867,10 +867,15 @@  static int sec_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	if (ret)
 		pci_warn(pdev, "Failed to init debugfs!\n");
 
-	ret = hisi_qm_alg_register(qm, &sec_devices);
-	if (ret < 0) {
-		pr_err("Failed to register driver to crypto.\n");
-		goto err_qm_stop;
+	if (qm->qp_num >= ctx_q_num) {
+		ret = hisi_qm_alg_register(qm, &sec_devices);
+		if (ret < 0) {
+			pr_err("Failed to register driver to crypto.\n");
+			goto err_qm_stop;
+		}
+	} else {
+		pci_warn(qm->pdev,
+			"Failed to use kernel mode, qp not enough!\n");
 	}
 
 	if (qm->uacce) {
@@ -906,7 +911,9 @@  static void sec_remove(struct pci_dev *pdev)
 	struct hisi_qm *qm = pci_get_drvdata(pdev);
 
 	hisi_qm_wait_task_finish(qm, &sec_devices);
-	hisi_qm_alg_unregister(qm, &sec_devices);
+	if (qm->qp_num >= ctx_q_num)
+		hisi_qm_alg_unregister(qm, &sec_devices);
+
 	if (qm->fun_type == QM_HW_PF && qm->vfs_num)
 		hisi_qm_sriov_disable(pdev, true);