From: Greentime Hu <greentime.hu@sifive.com>
To: greentime.hu@sifive.com, paul.walmsley@sifive.com,
hes@sifive.com, erik.danie@sifive.com, zong.li@sifive.com,
bhelgaas@google.com, robh+dt@kernel.org, aou@eecs.berkeley.edu,
mturquette@baylibre.com, sboyd@kernel.org,
lorenzo.pieralisi@arm.com, p.zabel@pengutronix.de,
alex.dewar90@gmail.com, khilman@baylibre.com,
hayashi.kunihiko@socionext.com, vidyas@nvidia.com,
jh80.chung@samsung.com, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
helgaas@kernel.org
Cc: Palmer Dabbelt <palmerdabbelt@google.com>
Subject: [PATCH v4 6/6] riscv: dts: Add PCIe support for the SiFive FU740-C000 SoC
Date: Thu, 1 Apr 2021 14:00:54 +0800 [thread overview]
Message-ID: <20210401060054.40788-7-greentime.hu@sifive.com> (raw)
In-Reply-To: <20210401060054.40788-1-greentime.hu@sifive.com>
Signed-off-by: Greentime Hu <greentime.hu@sifive.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
---
arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 33 ++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
index d1bb22b11920..b2317c8e3a80 100644
--- a/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu740-c000.dtsi
@@ -158,6 +158,7 @@ prci: clock-controller@10000000 {
reg = <0x0 0x10000000 0x0 0x1000>;
clocks = <&hfclk>, <&rtcclk>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};
uart0: serial@10010000 {
compatible = "sifive,fu740-c000-uart", "sifive,uart0";
@@ -288,5 +289,37 @@ gpio: gpio@10060000 {
clocks = <&prci PRCI_CLK_PCLK>;
status = "disabled";
};
+ pcie@e00000000 {
+ compatible = "sifive,fu740-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ reg = <0xe 0x00000000 0x0 0x80000000>,
+ <0xd 0xf0000000 0x0 0x10000000>,
+ <0x0 0x100d0000 0x0 0x1000>;
+ reg-names = "dbi", "config", "mgmt";
+ device_type = "pci";
+ dma-coherent;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */
+ <0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */
+ <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */
+ <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */
+ num-lanes = <0x8>;
+ interrupts = <56>, <57>, <58>, <59>, <60>, <61>, <62>, <63>, <64>;
+ interrupt-names = "msi", "inta", "intb", "intc", "intd";
+ interrupt-parent = <&plic0>;
+ interrupt-map-mask = <0x0 0x0 0x0 0x7>;
+ interrupt-map = <0x0 0x0 0x0 0x1 &plic0 57>,
+ <0x0 0x0 0x0 0x2 &plic0 58>,
+ <0x0 0x0 0x0 0x3 &plic0 59>,
+ <0x0 0x0 0x0 0x4 &plic0 60>;
+ clock-names = "pcie_aux";
+ clocks = <&prci PRCI_CLK_PCIE_AUX>;
+ pwren-gpios = <&gpio 5 0>;
+ reset-gpios = <&gpio 8 0>;
+ resets = <&prci 4>;
+ status = "okay";
+ };
};
};
--
2.30.2
prev parent reply other threads:[~2021-04-01 6:02 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-01 6:00 [PATCH v4 0/6] Add SiFive FU740 PCIe host controller driver support Greentime Hu
2021-04-01 6:00 ` [PATCH v4 1/6] clk: sifive: Add pcie_aux clock in prci driver for PCIe driver Greentime Hu
2021-04-01 6:00 ` [PATCH v4 2/6] clk: sifive: Use reset-simple " Greentime Hu
2021-04-01 6:00 ` [PATCH v4 3/6] MAINTAINERS: Add maintainers for SiFive FU740 " Greentime Hu
2021-04-01 6:00 ` [PATCH v4 4/6] dt-bindings: PCI: Add SiFive FU740 PCIe host controller Greentime Hu
2021-04-01 16:54 ` Rob Herring
2021-04-01 6:00 ` [PATCH v4 5/6] PCI: fu740: Add SiFive FU740 PCIe host controller driver Greentime Hu
2021-04-01 6:35 ` Krzysztof Wilczyński
2021-04-01 8:51 ` Damien Le Moal
2021-04-01 16:47 ` Rob Herring
2021-04-01 6:00 ` Greentime Hu [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210401060054.40788-7-greentime.hu@sifive.com \
--to=greentime.hu@sifive.com \
--cc=alex.dewar90@gmail.com \
--cc=aou@eecs.berkeley.edu \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=erik.danie@sifive.com \
--cc=hayashi.kunihiko@socionext.com \
--cc=helgaas@kernel.org \
--cc=hes@sifive.com \
--cc=jh80.chung@samsung.com \
--cc=khilman@baylibre.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmerdabbelt@google.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=vidyas@nvidia.com \
--cc=zong.li@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).