[irqchip:,irq/irqchip-next] irqchip/stm32: Add usart instances exti direct event support
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Message ID 161779909326.29796.193657241521429232.tip-bot2@tip-bot2
State Accepted
Commit e12c455055e9abc7403ce532616c0124a9d85ee7
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  • [irqchip:,irq/irqchip-next] irqchip/stm32: Add usart instances exti direct event support
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tip-bot2 for Thomas Gleixner April 7, 2021, 12:38 p.m. UTC
The following commit has been merged into the irq/irqchip-next branch of irqchip:

Commit-ID:     e12c455055e9abc7403ce532616c0124a9d85ee7
Gitweb:        https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/e12c455055e9abc7403ce532616c0124a9d85ee7
Author:        Erwan Le Ray <erwan.leray@foss.st.com>
AuthorDate:    Fri, 19 Mar 2021 19:42:51 +01:00
Committer:     Marc Zyngier <maz@kernel.org>
CommitterDate: Wed, 07 Apr 2021 13:25:52 +01:00

irqchip/stm32: Add usart instances exti direct event support

Add following usart instances exti direct event support (used for UART wake
up).
- exti 26 (USART1) is mapped to GIC 37
- exti 27 (USART2) is mapped to GIC 38
- exti 28 (USART3) is mapped to GIC 39
- exti 29 (USART6) is mapped to GIC 71
- exti 31 (UART5) is mapped to GIC 53
- exti 32 (UART7) is mapped to GIC 82
- exti 33 (UART8) is mapped to GIC 83

Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210319184253.5841-4-erwan.leray@foss.st.com
---
 drivers/irqchip/irq-stm32-exti.c | 7 +++++++
 1 file changed, 7 insertions(+)

Patch
diff mbox series

diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index 8662d7b..b9db90c 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -193,7 +193,14 @@  static const struct stm32_desc_irq stm32mp1_desc_irq[] = {
 	{ .exti = 23, .irq_parent = 72, .chip = &stm32_exti_h_chip_direct },
 	{ .exti = 24, .irq_parent = 95, .chip = &stm32_exti_h_chip_direct },
 	{ .exti = 25, .irq_parent = 107, .chip = &stm32_exti_h_chip_direct },
+	{ .exti = 26, .irq_parent = 37, .chip = &stm32_exti_h_chip_direct },
+	{ .exti = 27, .irq_parent = 38, .chip = &stm32_exti_h_chip_direct },
+	{ .exti = 28, .irq_parent = 39, .chip = &stm32_exti_h_chip_direct },
+	{ .exti = 29, .irq_parent = 71, .chip = &stm32_exti_h_chip_direct },
 	{ .exti = 30, .irq_parent = 52, .chip = &stm32_exti_h_chip_direct },
+	{ .exti = 31, .irq_parent = 53, .chip = &stm32_exti_h_chip_direct },
+	{ .exti = 32, .irq_parent = 82, .chip = &stm32_exti_h_chip_direct },
+	{ .exti = 33, .irq_parent = 83, .chip = &stm32_exti_h_chip_direct },
 	{ .exti = 47, .irq_parent = 93, .chip = &stm32_exti_h_chip_direct },
 	{ .exti = 48, .irq_parent = 138, .chip = &stm32_exti_h_chip_direct },
 	{ .exti = 50, .irq_parent = 139, .chip = &stm32_exti_h_chip_direct },