From: Nava kishore Manne <nava.manne@xilinx.com>
To: <robh+dt@kernel.org>, <michal.simek@xilinx.com>,
<derek.kiernan@xilinx.com>, <dragan.cvetic@xilinx.com>,
<arnd@arndb.de>, <gregkh@linuxfoundation.org>,
<nava.manne@xilinx.com>, <rajan.vaja@xilinx.com>,
<jolly.shah@xilinx.com>, <tejas.patel@xilinx.com>,
<amit.sunil.dhamne@xilinx.com>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <chinnikishore369@gmail.com>,
<git@xilinx.com>
Subject: [PATCH 4/5] misc: doc: Add binding doc for the zynqmp afi config driver
Date: Tue, 20 Apr 2021 13:41:52 +0530 [thread overview]
Message-ID: <20210420081153.17020-5-nava.manne@xilinx.com> (raw)
In-Reply-To: <20210420081153.17020-1-nava.manne@xilinx.com>
This patch adds the binding document for the zynqmp afi
config driver.
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
.../bindings/misc/xlnx,zynqmp-afi-fpga.yaml | 136 ++++++++++++++++++
1 file changed, 136 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/xlnx,zynqmp-afi-fpga.yaml
diff --git a/Documentation/devicetree/bindings/misc/xlnx,zynqmp-afi-fpga.yaml b/Documentation/devicetree/bindings/misc/xlnx,zynqmp-afi-fpga.yaml
new file mode 100644
index 000000000000..3ae22096b22a
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/xlnx,zynqmp-afi-fpga.yaml
@@ -0,0 +1,136 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/xlnx,zynqmp-afi-fpga.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx ZynqMP AFI interface Manager.
+
+maintainers:
+ - Nava kishore Manne <nava.manne@xilinx.com>
+
+description: |
+ The Zynq UltraScale+ MPSoC Processing System core provides access from PL
+ masters to PS internal peripherals, and memory through AXI FIFO interface(AFI)
+ interfaces.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - xlnx,zynqmp-afi-fpga
+
+ config-afi:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |
+ Pairs of <regid value >
+ The possible values of regid and values are
+ regid - Regids of the register to be written possible values
+ 0- AFIFM0_RDCTRL
+ 1- AFIFM0_WRCTRL
+ 2- AFIFM1_RDCTRL
+ 3- AFIFM1_WRCTRL
+ 4- AFIFM2_RDCTRL
+ 5- AFIFM2_WRCTRL
+ 6- AFIFM3_RDCTRL
+ 7- AFIFM3_WRCTRL
+ 8- AFIFM4_RDCTRL
+ 9- AFIFM4_WRCTRL
+ 10- AFIFM5_RDCTRL
+ 11- AFIFM5_WRCTRL
+ 12- AFIFM6_RDCTRL
+ 13- AFIFM6_WRCTRL
+ 14- AFIFS
+ 15- AFIFS_SS2
+ value - Array of values to be written.
+ for FM0_RDCTRL(0) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM0_WRCTRL(1) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM1_RDCTRL(2) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM1_WRCTRL(3) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM2_RDCTRL(4) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM2_WRCTRL(5) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM3_RDCTRL(6) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM3_WRCTRL(7) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM4_RDCTRL(8) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM4_WRCTRL(9) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM5_RDCTRL(10) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM5_WRCTRL(11) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM6_RDCTRL(12) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for FM6_WRCTRL(13) the valid values-fabric width
+ 2 - 32-bit
+ 1 - 64-bit
+ 0 - 128-bit
+ for AFI_FA(14)
+ dw_ss1_sel bits (11:10)
+ dw_ss0_sel bits (9:8)
+ 0x0 - 32-bit AXI data width
+ 0x1 - 64-bit AXI data width
+ 0x2 - 128-bit AXI data width
+ All other bits are 0 write ignored.
+
+ for AFI_FA(15) selects for ss2AXI data width valid values
+ 0x000 - 32-bit AXI data width
+ 0x100 - 64-bit AXI data width
+ 0x200 - 128-bit AXI data width
+ minItems: 1
+ maxItems: 15
+
+required:
+ - compatible
+ - config-afi
+
+additionalProperties: false
+
+examples:
+ - |
+ firmware {
+ zynqmp_firmware: zynqmp-firmware {
+ compatible = "xlnx,zynqmp-firmware";
+ method = "smc";
+ afi0: afi {
+ compatible = "xlnx,afi-fpga";
+ config-afi = <0 2>, <1 1>, <2 1>;
+ };
+ };
+ };
+
+...
--
2.18.0
next prev parent reply other threads:[~2021-04-20 8:21 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-20 8:11 [PATCH 0/5]misc: Add afi config drivers support Nava kishore Manne
2021-04-20 8:11 ` [PATCH 1/5] misc: doc: Add binding doc for the afi config driver Nava kishore Manne
2021-04-20 8:11 ` [PATCH 2/5] misc: zynq: Add " Nava kishore Manne
2021-04-20 8:46 ` Greg KH
2021-04-20 13:36 ` Nava kishore Manne
2021-04-20 15:27 ` Greg KH
2021-04-29 6:23 ` Nava kishore Manne
2021-04-20 18:17 ` Randy Dunlap
2021-04-20 8:11 ` [PATCH 3/5] firmware: xilinx: Add afi ioctl support Nava kishore Manne
2021-04-20 8:11 ` Nava kishore Manne [this message]
2021-04-20 13:58 ` [PATCH 4/5] misc: doc: Add binding doc for the zynqmp afi config driver Rob Herring
2021-04-29 4:56 ` Nava kishore Manne
2021-04-20 14:15 ` Rob Herring
2021-04-29 5:39 ` Nava kishore Manne
2021-04-20 8:11 ` [PATCH 5/5] misc: zynqmp: Add " Nava kishore Manne
2021-04-20 8:47 ` Greg KH
2021-04-20 13:45 ` Nava kishore Manne
2021-04-20 8:51 ` Greg KH
2021-04-20 13:47 ` Nava kishore Manne
2021-04-20 15:28 ` Greg KH
2021-04-29 6:01 ` Nava kishore Manne
2021-04-20 18:15 ` Randy Dunlap
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210420081153.17020-5-nava.manne@xilinx.com \
--to=nava.manne@xilinx.com \
--cc=amit.sunil.dhamne@xilinx.com \
--cc=arnd@arndb.de \
--cc=chinnikishore369@gmail.com \
--cc=derek.kiernan@xilinx.com \
--cc=devicetree@vger.kernel.org \
--cc=dragan.cvetic@xilinx.com \
--cc=git@xilinx.com \
--cc=gregkh@linuxfoundation.org \
--cc=jolly.shah@xilinx.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=michal.simek@xilinx.com \
--cc=rajan.vaja@xilinx.com \
--cc=robh+dt@kernel.org \
--cc=tejas.patel@xilinx.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).