From: Prashant Malani <pmalani@chromium.org>
To: linux-kernel@vger.kernel.org
Cc: Prashant Malani <pmalani@chromium.org>,
Benson Leung <bleung@chromium.org>,
Enric Balletbo i Serra <enric.balletbo@collabora.com>,
Guenter Roeck <groeck@chromium.org>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>,
Mark Brown <broonie@kernel.org>,
Pi-Hsun Shih <pihsun@chromium.org>,
Utkarsh Patel <utkarsh.h.patel@intel.com>,
Yu-Hsuan Hsu <yuhsuan@chromium.org>
Subject: [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C hard reset
Date: Tue, 20 Apr 2021 10:16:11 -0700 [thread overview]
Message-ID: <20210420171617.3830902-1-pmalani@chromium.org> (raw)
Update the EC command header to include the new event bit. This bit
is included in the latest version of the Chrome EC headers[1].
[1] https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/include/ec_commands.h
Signed-off-by: Prashant Malani <pmalani@chromium.org>
---
Changes in v3:
- Remove Change-Id tag and add Signed-off-by tag to the commit message.
v2 is the first version the patch was introduced.
include/linux/platform_data/cros_ec_commands.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
index 5ff8597ceabd..9156078c6fc6 100644
--- a/include/linux/platform_data/cros_ec_commands.h
+++ b/include/linux/platform_data/cros_ec_commands.h
@@ -5678,6 +5678,7 @@ enum tcpc_cc_polarity {
#define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0)
#define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1)
+#define PD_STATUS_EVENT_HARD_RESET BIT(2)
struct ec_params_typec_status {
uint8_t port;
--
2.31.1.368.gbe11c130af-goog
next reply other threads:[~2021-04-20 17:16 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-20 17:16 Prashant Malani [this message]
2021-04-20 17:16 ` [PATCH v3 2/2] platform/chrome: cros_ec_typec: Handle hard reset Prashant Malani
2021-04-23 6:57 ` [PATCH v3 1/2] platform/chrome: cros_ec: Add Type C " Enric Balletbo i Serra
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