From: Ansuel Smith <ansuelsmth@gmail.com>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: Ansuel Smith <ansuelsmth@gmail.com>, Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
netdev@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 07/14] drivers: net: dsa: qca8k: limit priority tweak to qca8337 switch
Date: Fri, 23 Apr 2021 03:47:33 +0200 [thread overview]
Message-ID: <20210423014741.11858-8-ansuelsmth@gmail.com> (raw)
In-Reply-To: <20210423014741.11858-1-ansuelsmth@gmail.com>
The packet priority tweak and the rx delay is specific to qca8337.
Limit this changes to qca8337 as now we also support 8327 switch.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
drivers/net/dsa/qca8k.c | 84 +++++++++++++++++++++++------------------
1 file changed, 48 insertions(+), 36 deletions(-)
diff --git a/drivers/net/dsa/qca8k.c b/drivers/net/dsa/qca8k.c
index ca12394c2ff7..19bb3754d9ec 100644
--- a/drivers/net/dsa/qca8k.c
+++ b/drivers/net/dsa/qca8k.c
@@ -700,9 +700,13 @@ static int
qca8k_setup(struct dsa_switch *ds)
{
struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv;
+ const struct qca8k_match_data *data;
int ret, i;
u32 mask;
+ /* get the switches ID from the compatible */
+ data = of_device_get_match_data(priv->dev);
+
/* Make sure that port 0 is the cpu port */
if (!dsa_is_cpu_port(ds, 0)) {
pr_err("port 0 is not the CPU port\n");
@@ -790,41 +794,43 @@ qca8k_setup(struct dsa_switch *ds)
* To fix this the original code has some specific priority values
* suggested by the QCA switch team.
*/
- for (i = 0; i < QCA8K_NUM_PORTS; i++) {
- switch (i) {
- /* The 2 CPU port and port 5 requires some different
- * priority than any other ports.
- */
- case 0:
- case 5:
- case 6:
- mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |
- QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |
- QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) |
- QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) |
- QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) |
- QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) |
- QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e);
- break;
- default:
- mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |
- QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |
- QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) |
- QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) |
- QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19);
+ if (data->id == QCA8K_ID_QCA8337) {
+ for (i = 0; i < QCA8K_NUM_PORTS; i++) {
+ switch (i) {
+ /* The 2 CPU port and port 5 requires some different
+ * priority than any other ports.
+ */
+ case 0:
+ case 5:
+ case 6:
+ mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |
+ QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |
+ QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) |
+ QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) |
+ QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) |
+ QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) |
+ QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e);
+ break;
+ default:
+ mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) |
+ QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) |
+ QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) |
+ QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) |
+ QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19);
+ }
+ qca8k_write(priv, QCA8K_REG_PORT_HOL_CTRL0(i), mask);
+
+ mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) |
+ QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |
+ QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |
+ QCA8K_PORT_HOL_CTRL1_WRED_EN;
+ qca8k_rmw(priv, QCA8K_REG_PORT_HOL_CTRL1(i),
+ QCA8K_PORT_HOL_CTRL1_ING_BUF |
+ QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |
+ QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |
+ QCA8K_PORT_HOL_CTRL1_WRED_EN,
+ mask);
}
- qca8k_write(priv, QCA8K_REG_PORT_HOL_CTRL0(i), mask);
-
- mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) |
- QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |
- QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |
- QCA8K_PORT_HOL_CTRL1_WRED_EN;
- qca8k_rmw(priv, QCA8K_REG_PORT_HOL_CTRL1(i),
- QCA8K_PORT_HOL_CTRL1_ING_BUF |
- QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN |
- QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN |
- QCA8K_PORT_HOL_CTRL1_WRED_EN,
- mask);
}
/* Flush the FDB table */
@@ -840,9 +846,13 @@ static void
qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
const struct phylink_link_state *state)
{
+ const struct qca8k_match_data *data;
struct qca8k_priv *priv = ds->priv;
u32 reg, val;
+ /* get the switches ID from the compatible */
+ data = of_device_get_match_data(priv->dev);
+
switch (port) {
case 0: /* 1st CPU port */
if (state->interface != PHY_INTERFACE_MODE_RGMII &&
@@ -895,8 +905,10 @@ qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
QCA8K_PORT_PAD_RGMII_RX_DELAY(2) |
QCA8K_PORT_PAD_RGMII_TX_DELAY_EN |
QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
- qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
- QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
+ /* QCA8337 requires to set rgmii rx delay */
+ if (data->id == QCA8K_ID_QCA8337)
+ qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL,
+ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN);
break;
case PHY_INTERFACE_MODE_SGMII:
case PHY_INTERFACE_MODE_1000BASEX:
--
2.30.2
next prev parent reply other threads:[~2021-04-23 1:48 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-23 1:47 [PATCH 00/14] Multiple improvement to qca8k stability Ansuel Smith
2021-04-23 1:47 ` [PATCH 01/14] drivers: net: dsa: qca8k: handle error with set_page Ansuel Smith
2021-04-23 1:52 ` Florian Fainelli
2021-04-23 1:47 ` [PATCH 02/14] drivers: net: dsa: qca8k: tweak internal delay to oem spec Ansuel Smith
2021-04-23 1:53 ` Florian Fainelli
2021-04-23 1:57 ` Ansuel Smith
2021-04-23 1:58 ` Florian Fainelli
2021-04-23 12:25 ` Andrew Lunn
2021-04-23 1:47 ` [PATCH 03/14] drivers: net: mdio: mdio-ip8064: improve busy wait delay Ansuel Smith
2021-04-23 1:56 ` Florian Fainelli
2021-04-23 2:03 ` Ansuel Smith
2021-04-23 12:38 ` Andrew Lunn
2021-04-23 1:47 ` [PATCH 04/14] drivers: net: dsa: qca8k: apply suggested packet priority Ansuel Smith
2021-04-23 1:47 ` [PATCH 05/14] drivers: net: dsa: qca8k: add support for qca8327 switch Ansuel Smith
2021-04-23 12:42 ` Andrew Lunn
2021-04-23 1:47 ` [PATCH 06/14] devicetree: net: dsa: qca8k: Document new compatible qca8327 Ansuel Smith
2021-04-23 1:47 ` Ansuel Smith [this message]
2021-04-23 1:59 ` [PATCH 07/14] drivers: net: dsa: qca8k: limit priority tweak to qca8337 switch Florian Fainelli
2021-04-23 1:47 ` [PATCH 08/14] drivers: net: dsa: qca8k: add GLOBAL_FC settings needed for qca8327 Ansuel Smith
2021-04-23 1:47 ` [PATCH 09/14] drivers: net: dsa: qca8k: add support for switch rev Ansuel Smith
2021-04-23 1:47 ` [PATCH 10/14] drivers: net: dsa: qca8k: add support for specific QCA access function Ansuel Smith
2021-04-23 12:47 ` Andrew Lunn
2021-04-23 1:47 ` [PATCH 11/14] drivers: net: dsa: qca8k: apply switch revision fix Ansuel Smith
2021-04-23 2:02 ` Florian Fainelli
2021-04-24 21:18 ` Ansuel Smith
2021-04-24 21:49 ` Heiner Kallweit
2021-04-25 1:09 ` Florian Fainelli
2021-04-25 1:19 ` Ansuel Smith
2021-04-25 4:45 ` DENG Qingfang
2021-04-25 11:59 ` Ansuel Smith
2021-04-25 14:33 ` Andrew Lunn
2021-04-23 1:47 ` [PATCH 12/14] drivers: net: dsa: qca8k: clear MASTER_EN after phy read/write Ansuel Smith
2021-04-23 1:47 ` [PATCH 13/14] drivers: net: dsa: qca8k: protect MASTER busy_wait with mdio mutex Ansuel Smith
2021-04-23 12:53 ` Andrew Lunn
2021-04-23 1:47 ` [PATCH 14/14] drivers: net: dsa: qca8k: enlarge mdio delay and timeout Ansuel Smith
2021-04-23 1:51 ` [PATCH 00/14] Multiple improvement to qca8k stability Florian Fainelli
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210423014741.11858-8-ansuelsmth@gmail.com \
--to=ansuelsmth@gmail.com \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=devicetree@vger.kernel.org \
--cc=f.fainelli@gmail.com \
--cc=hkallweit1@gmail.com \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=netdev@vger.kernel.org \
--cc=olteanv@gmail.com \
--cc=robh+dt@kernel.org \
--cc=vivien.didelot@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).