From: Yazen Ghannam <Yazen.Ghannam@amd.com>
To: linux-edac@vger.kernel.org
Cc: Yazen Ghannam <Yazen.Ghannam@amd.com>,
linux-kernel@vger.kernel.org, tony.luck@intel.com,
x86@kernel.org, Smita.KoralahalliChannabasappa@amd.com
Subject: [PATCH 16/25] x86/MCE/AMD: Define function to get number of interleaved sockets
Date: Fri, 7 May 2021 15:01:31 -0400 [thread overview]
Message-ID: <20210507190140.18854-17-Yazen.Ghannam@amd.com> (raw)
In-Reply-To: <20210507190140.18854-1-Yazen.Ghannam@amd.com>
From: Yazen Ghannam <yazen.ghannam@amd.com>
Move parsing of the number of interleaved sockets to a separate helper
function. This will be expanded for future DF versions.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
arch/x86/kernel/cpu/mce/amd.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c
index de59fa6cf540..670787be705d 100644
--- a/arch/x86/kernel/cpu/mce/amd.c
+++ b/arch/x86/kernel/cpu/mce/amd.c
@@ -731,6 +731,7 @@ struct addr_ctx {
u8 intlv_addr_bit;
u8 intlv_num_chan;
u8 intlv_num_dies;
+ u8 intlv_num_sockets;
u8 cs_id;
bool hash_enabled;
};
@@ -854,12 +855,16 @@ static void get_intlv_num_dies(struct addr_ctx *ctx)
ctx->intlv_num_dies = (ctx->reg_limit_addr >> 10) & 0x3;
}
+static void get_intlv_num_sockets(struct addr_ctx *ctx)
+{
+ ctx->intlv_num_sockets = (ctx->reg_limit_addr >> 8) & 0x1;
+}
+
static int denormalize_addr(struct addr_ctx *ctx)
{
u32 tmp;
u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask;
- u8 intlv_num_sockets;
u8 num_intlv_bits, cs_mask = 0;
/* Return early if no interleaving. */
@@ -869,16 +874,13 @@ static int denormalize_addr(struct addr_ctx *ctx)
if (get_intlv_addr_bit(ctx))
return -EINVAL;
- intlv_num_sockets = (ctx->reg_limit_addr >> 8) & 0x1;
-
get_intlv_num_chan(ctx);
get_intlv_num_dies(ctx);
+ get_intlv_num_sockets(ctx);
num_intlv_bits = ctx->intlv_num_chan;
num_intlv_bits += ctx->intlv_num_dies;
-
- /* Add a bit if sockets are interleaved. */
- num_intlv_bits += intlv_num_sockets;
+ num_intlv_bits += ctx->intlv_num_sockets;
/* Assert num_intlv_bits <= 4 */
if (num_intlv_bits > 4) {
@@ -912,7 +914,7 @@ static int denormalize_addr(struct addr_ctx *ctx)
sock_id_bit = die_id_bit;
- if (ctx->intlv_num_dies || intlv_num_sockets)
+ if (ctx->intlv_num_dies || ctx->intlv_num_sockets)
if (amd_df_indirect_read(ctx->nid, df_regs[SYS_FAB_ID_MASK],
ctx->umc, &tmp))
return -EINVAL;
@@ -928,7 +930,7 @@ static int denormalize_addr(struct addr_ctx *ctx)
}
/* If interleaved over more than 1 socket. */
- if (intlv_num_sockets) {
+ if (ctx->intlv_num_sockets) {
socket_id_shift = (tmp >> 28) & 0xF;
socket_id_mask = (tmp >> 16) & 0xFF;
--
2.25.1
next prev parent reply other threads:[~2021-05-07 19:03 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-07 19:01 [PATCH 00/25] AMD MCA Address Translation Updates Yazen Ghannam
2021-05-07 19:01 ` [PATCH 01/25] x86/MCE/AMD: Don't use naked values for DF registers Yazen Ghannam
2021-05-07 19:01 ` [PATCH 02/25] x86/MCE/AMD: Add context struct Yazen Ghannam
2021-05-07 19:01 ` [PATCH 03/25] x86/MCE/AMD: Define functions for DramOffset Yazen Ghannam
2021-05-07 19:01 ` [PATCH 04/25] x86/MCE/AMD: Define function to read DRAM address map registers Yazen Ghannam
2021-05-07 19:01 ` [PATCH 05/25] x86/MCE/AMD: Define function to find interleaving mode Yazen Ghannam
2021-05-07 19:01 ` [PATCH 06/25] x86/MCE/AMD: Define function to denormalize address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 07/25] x86/MCE/AMD: Define function to add DRAM base and hole Yazen Ghannam
2021-05-07 19:01 ` [PATCH 08/25] x86/MCE/AMD: Define function to dehash address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 09/25] x86/MCE/AMD: Define function to check DRAM limit address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 10/25] x86/MCE/AMD: Remove goto statements Yazen Ghannam
2021-05-07 19:01 ` [PATCH 11/25] x86/MCE/AMD: Simplify function parameters Yazen Ghannam
2021-05-07 19:01 ` [PATCH 12/25] x86/MCE/AMD: Define function to get Interleave Address Bit Yazen Ghannam
2021-05-07 19:01 ` [PATCH 13/25] x86/MCE/AMD: Skip denormalization if no interleaving Yazen Ghannam
2021-05-07 19:01 ` [PATCH 14/25] x86/MCE/AMD: Define function to get number of interleaved channels Yazen Ghannam
2021-05-07 19:01 ` [PATCH 15/25] x86/MCE/AMD: Define function to get number of interleaved dies Yazen Ghannam
2021-05-07 19:01 ` Yazen Ghannam [this message]
2021-05-07 19:01 ` [PATCH 17/25] x86/MCE/AMD: Remove unnecessary assert Yazen Ghannam
2021-05-07 19:01 ` [PATCH 18/25] x86/MCE/AMD: Define function to make space for CS ID Yazen Ghannam
2021-05-07 19:01 ` [PATCH 19/25] x86/MCE/AMD: Define function to calculate " Yazen Ghannam
2021-05-07 19:01 ` [PATCH 20/25] x86/MCE/AMD: Define function to insert CS ID into address Yazen Ghannam
2021-05-07 19:01 ` [PATCH 21/25] x86/MCE/AMD: Define function to get CS Fabric ID Yazen Ghannam
2021-05-07 19:01 ` [PATCH 22/25] x86/MCE/AMD: Define function to find shift and mask values Yazen Ghannam
2021-05-07 19:01 ` [PATCH 23/25] x86/MCE/AMD: Update CS ID calculation to match reference code Yazen Ghannam
2021-05-07 19:01 ` [PATCH 24/25] x86/MCE/AMD: Match hash function to " Yazen Ghannam
2021-05-07 19:01 ` [PATCH 25/25] x86/MCE/AMD: Add support for address translation on DF3 systems Yazen Ghannam
2021-05-07 20:32 ` [PATCH 00/25] AMD MCA Address Translation Updates Randy Dunlap
2021-05-11 15:42 ` Yazen Ghannam
2021-05-11 16:13 ` Randy Dunlap
2021-05-11 16:28 ` Borislav Petkov
2021-05-17 12:57 ` Borislav Petkov
2021-05-19 3:52 ` Yazen Ghannam
2021-05-19 14:32 ` Borislav Petkov
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