linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de
Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org,
	agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, ping.bai@nxp.com,
	frieder.schrempf@kontron.de, aford173@gmail.com,
	abel.vesa@nxp.com, Peng Fan <peng.fan@nxp.com>
Subject: [PATCH V3 12/13] soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains
Date: Mon, 10 May 2021 12:00:44 +0800	[thread overview]
Message-ID: <20210510040045.13225-13-peng.fan@oss.nxp.com> (raw)
In-Reply-To: <20210510040045.13225-1-peng.fan@oss.nxp.com>

From: Lucas Stach <l.stach@pengutronix.de>

With the BLK-CTL driver now in place, let's add the missing domains.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/soc/imx/gpcv2.c | 70 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 70 insertions(+)

diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index d676e65e8c16..2490757f759d 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -650,6 +650,76 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
 		},
 		.pgc   = IMX8MM_PGC_GPU2D,
 	},
+
+	[IMX8MM_POWER_DOMAIN_VPUMIX] = {
+		.genpd = {
+			.name = "vpumix",
+		},
+		.bits  = {
+			.pxx = IMX8MM_VPUMIX_SW_Pxx_REQ,
+			.map = IMX8MM_VPUMIX_A53_DOMAIN,
+			.hskreq = IMX8MM_VPUMIX_HSK_PWRDNREQN,
+			.hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN,
+		},
+		.pgc   = IMX8MM_PGC_VPUMIX,
+	},
+
+	[IMX8MM_POWER_DOMAIN_VPUG1] = {
+		.genpd = {
+			.name = "vpu-g1",
+		},
+		.bits  = {
+			.pxx = IMX8MM_VPUG1_SW_Pxx_REQ,
+			.map = IMX8MM_VPUG1_A53_DOMAIN,
+		},
+		.pgc   = IMX8MM_PGC_VPUG1,
+	},
+
+	[IMX8MM_POWER_DOMAIN_VPUG2] = {
+		.genpd = {
+			.name = "vpu-g2",
+		},
+		.bits  = {
+			.pxx = IMX8MM_VPUG2_SW_Pxx_REQ,
+			.map = IMX8MM_VPUG2_A53_DOMAIN,
+		},
+		.pgc   = IMX8MM_PGC_VPUG2,
+	},
+
+	[IMX8MM_POWER_DOMAIN_VPUH1] = {
+		.genpd = {
+			.name = "vpu-h1",
+		},
+		.bits  = {
+			.pxx = IMX8MM_VPUH1_SW_Pxx_REQ,
+			.map = IMX8MM_VPUH1_A53_DOMAIN,
+		},
+		.pgc   = IMX8MM_PGC_VPUH1,
+	},
+
+	[IMX8MM_POWER_DOMAIN_DISPMIX] = {
+		.genpd = {
+			.name = "dispmix",
+		},
+		.bits  = {
+			.pxx = IMX8MM_DISPMIX_SW_Pxx_REQ,
+			.map = IMX8MM_DISPMIX_A53_DOMAIN,
+			.hskreq = IMX8MM_DISPMIX_HSK_PWRDNREQN,
+			.hskack = IMX8MM_DISPMIX_HSK_PWRDNACKN,
+		},
+		.pgc   = IMX8MM_PGC_DISPMIX,
+	},
+
+	[IMX8MM_POWER_DOMAIN_MIPI] = {
+		.genpd = {
+			.name = "mipi",
+		},
+		.bits  = {
+			.pxx = IMX8MM_MIPI_SW_Pxx_REQ,
+			.map = IMX8MM_MIPI_A53_DOMAIN,
+		},
+		.pgc   = IMX8MM_PGC_MIPI,
+	},
 };
 
 static const struct regmap_range imx8mm_yes_ranges[] = {
-- 
2.30.0


  parent reply	other threads:[~2021-05-10  3:30 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-10  4:00 [PATCH V3 00/13] soc: imx: gpcv2: support i.MX8MM Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 01/13] soc: imx: gpcv2: move to more ideomatic error handling in probe Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 02/13] soc: imx: gpcv2: move domain mapping to domain driver probe Peng Fan (OSS)
2021-05-23  2:59   ` Shawn Guo
2021-05-10  4:00 ` [PATCH V3 03/13] soc: imx: gpcv2: switch to clk_bulk_* API Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 04/13] soc: imx: gpcv2: split power up and power down sequence control Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 05/13] soc: imx: gpcv2: wait for ADB400 handshake Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 06/13] soc: imx: gpcv2: add runtime PM support for power-domains Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 07/13] soc: imx: gpcv2: allow domains without power-sequence control Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 08/13] dt-bindings: imx: gpcv2: add support for optional resets Peng Fan (OSS)
2021-05-10 16:19   ` Rob Herring
2021-05-10  4:00 ` [PATCH V3 09/13] soc: " Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 10/13] dt-bindings: power: add defines for i.MX8MM power domains Peng Fan (OSS)
2021-05-10  4:00 ` [PATCH V3 11/13] soc: imx: gpcv2: add support " Peng Fan (OSS)
2021-05-10  4:00 ` Peng Fan (OSS) [this message]
2021-05-10  4:00 ` [PATCH V3 13/13] soc: imx: gpcv2: move reset assert after requesting domain power up Peng Fan (OSS)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210510040045.13225-13-peng.fan@oss.nxp.com \
    --to=peng.fan@oss.nxp.com \
    --cc=abel.vesa@nxp.com \
    --cc=aford173@gmail.com \
    --cc=agx@sigxcpu.org \
    --cc=andrew.smirnov@gmail.com \
    --cc=devicetree@vger.kernel.org \
    --cc=festevam@gmail.com \
    --cc=frieder.schrempf@kontron.de \
    --cc=kernel@pengutronix.de \
    --cc=krzk@kernel.org \
    --cc=l.stach@pengutronix.de \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=marex@denx.de \
    --cc=p.zabel@pengutronix.de \
    --cc=peng.fan@nxp.com \
    --cc=ping.bai@nxp.com \
    --cc=robh+dt@kernel.org \
    --cc=s.hauer@pengutronix.de \
    --cc=shawnguo@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).