[v2,5/9] x86/desc: add native_[ig]dt_invalidate() to <asm/desc.h>
diff mbox series

Message ID 20210515014400.2999028-6-hpa@zytor.com
State New, archived
Headers show
Series
  • x86/irq: trap and interrupt cleanups
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Commit Message

H. Peter Anvin May 15, 2021, 1:43 a.m. UTC
From: "H. Peter Anvin (Intel)" <hpa@zytor.com>

In some places, we want the native forms of descriptor table
invalidation. Rather than open-coding them, add explicitly native
functions to invalidate the GDT and IDT.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
---
 arch/x86/include/asm/desc.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Andy Lutomirski May 15, 2021, 3:29 p.m. UTC | #1
On 5/14/21 6:43 PM, H. Peter Anvin wrote:
> From: "H. Peter Anvin (Intel)" <hpa@zytor.com>
> 
> In some places, we want the native forms of descriptor table
> invalidation. Rather than open-coding them, add explicitly native
> functions to invalidate the GDT and IDT.
> 
> Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
> ---
>  arch/x86/include/asm/desc.h | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
> index b8429ae50b71..aa366b2bbc41 100644
> --- a/arch/x86/include/asm/desc.h
> +++ b/arch/x86/include/asm/desc.h
> @@ -224,6 +224,21 @@ static inline void store_idt(struct desc_ptr *dtr)
>  	asm volatile("sidt %0":"=m" (*dtr));
>  }
>  
> +static const struct desc_ptr __invalid_gdt_idt_ptr __maybe_unused = {
> +	.address = 0,
> +	.size = 0
> +};

I'm not convinced that putting this in a header is really a great idea.
How about:

> +
> +static inline void native_gdt_invalidate(void)
> +{
        const struct desc_ptr ... = ...;

> +	native_load_gdt(&__invalid_gdt_idt_ptr);
> +}

That should generate two PUSH instructions and may well result in a
smaller binary :)

--Andy

Patch
diff mbox series

diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index b8429ae50b71..aa366b2bbc41 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -224,6 +224,21 @@  static inline void store_idt(struct desc_ptr *dtr)
 	asm volatile("sidt %0":"=m" (*dtr));
 }
 
+static const struct desc_ptr __invalid_gdt_idt_ptr __maybe_unused = {
+	.address = 0,
+	.size = 0
+};
+
+static inline void native_gdt_invalidate(void)
+{
+	native_load_gdt(&__invalid_gdt_idt_ptr);
+}
+
+static inline void native_idt_invalidate(void)
+{
+	native_load_idt(&__invalid_gdt_idt_ptr);
+}
+
 /*
  * The LTR instruction marks the TSS GDT entry as busy. On 64-bit, the GDT is
  * a read-only remapping. To prevent a page fault, the GDT is switched to the