From: Desmond Cheong Zhi Xi <desmondcheongzx@gmail.com>
To: gregkh@linuxfoundation.org, marcocesati@gmail.com,
dan.carpenter@oracle.com, fabioaiuto83@gmail.com,
fmdefrancesco@gmail.com, eantoranz@gmail.com,
hdegoede@redhat.com, Larry.Finger@lwfinger.net
Cc: Desmond Cheong Zhi Xi <desmondcheongzx@gmail.com>,
skhan@linuxfoundation.org, linux-staging@lists.linux.dev,
linux-kernel@vger.kernel.org,
linux-kernel-mentees@lists.linuxfoundation.org
Subject: [PATCH 1/7] Staging: rtl8723bs: remove unnecessary braces in HalBtc8723b1Ant.c
Date: Sun, 16 May 2021 08:29:21 -0400 [thread overview]
Message-ID: <20210516122927.1132356-2-desmondcheongzx@gmail.com> (raw)
In-Reply-To: <20210516122927.1132356-1-desmondcheongzx@gmail.com>
This commit fixes the following checkpatch.pl warnings:
WARNING: braces {} are not necessary for any arm of this statement
+ if (btRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (btRssi < rssiThresh) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for single statement blocks
+ if (rssiThresh > rssiThresh1) {
+ return pCoexSta->preBtRssiState;
+ }
WARNING: braces {} are not necessary for any arm of this statement
+ if (btRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (btRssi >= (rssiThresh1 + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) {
[...]
+ } else if (btRssi < rssiThresh) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (btRssi < rssiThresh1) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for single statement blocks
+ if (!pBtLinkInfo->bBtLinkExist) {
+ return algorithm;
+ }
WARNING: braces {} are not necessary for any arm of this statement
+ if (bBtHsOn) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (bBtHsOn) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (bBtHsOn) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (bBtHsOn) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (bBtHsOn) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (bBtHsOn) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (bBtHsOn) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (u1Tmp & BIT0) {
[...]
+ } else {
[...]
WARNING: braces {} are not necessary for single statement blocks
+ if (pBtCoexist->bManualControl) {
+ return;
+ }
WARNING: braces {} are not necessary for single statement blocks
+ if (pBtCoexist->bStopCoexDm) {
+ return;
+ }
WARNING: braces {} are not necessary for single statement blocks
+ if (pCoexSta->bUnderIps) {
+ return;
+ }
WARNING: braces {} are not necessary for any arm of this statement
+ if ((pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage)) {
[...]
+ } else
[...]
WARNING: braces {} are not necessary for any arm of this statement
+ if (BTC_LPS_ENABLE == type) {
[...]
+ } else if (BTC_LPS_DISABLE == type) {
[...]
WARNING: braces {} are not necessary for single statement blocks
+ if (!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) {
+ halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, false);
+ }
Signed-off-by: Desmond Cheong Zhi Xi <desmondcheongzx@gmail.com>
---
.../staging/rtl8723bs/hal/HalBtc8723b1Ant.c | 94 ++++++++-----------
1 file changed, 37 insertions(+), 57 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c b/drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c
index 300327f8706c..85bf45cabecd 100644
--- a/drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c
+++ b/drivers/staging/rtl8723bs/hal/HalBtc8723b1Ant.c
@@ -38,50 +38,44 @@ static u8 halbtc8723b1ant_BtRssiState(
(pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
(pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)
) {
- if (btRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) {
+ if (btRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT))
btRssiState = BTC_RSSI_STATE_HIGH;
- } else {
+ else
btRssiState = BTC_RSSI_STATE_STAY_LOW;
- }
} else {
- if (btRssi < rssiThresh) {
+ if (btRssi < rssiThresh)
btRssiState = BTC_RSSI_STATE_LOW;
- } else {
+ else
btRssiState = BTC_RSSI_STATE_STAY_HIGH;
- }
}
} else if (levelNum == 3) {
- if (rssiThresh > rssiThresh1) {
+ if (rssiThresh > rssiThresh1)
return pCoexSta->preBtRssiState;
- }
if (
(pCoexSta->preBtRssiState == BTC_RSSI_STATE_LOW) ||
(pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_LOW)
) {
- if (btRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) {
+ if (btRssi >= (rssiThresh + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT))
btRssiState = BTC_RSSI_STATE_MEDIUM;
- } else {
+ else
btRssiState = BTC_RSSI_STATE_STAY_LOW;
- }
} else if (
(pCoexSta->preBtRssiState == BTC_RSSI_STATE_MEDIUM) ||
(pCoexSta->preBtRssiState == BTC_RSSI_STATE_STAY_MEDIUM)
) {
- if (btRssi >= (rssiThresh1 + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT)) {
+ if (btRssi >= (rssiThresh1 + BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT))
btRssiState = BTC_RSSI_STATE_HIGH;
- } else if (btRssi < rssiThresh) {
+ else if (btRssi < rssiThresh)
btRssiState = BTC_RSSI_STATE_LOW;
- } else {
+ else
btRssiState = BTC_RSSI_STATE_STAY_MEDIUM;
- }
} else {
- if (btRssi < rssiThresh1) {
+ if (btRssi < rssiThresh1)
btRssiState = BTC_RSSI_STATE_MEDIUM;
- } else {
+ else
btRssiState = BTC_RSSI_STATE_STAY_HIGH;
- }
}
}
@@ -508,9 +502,8 @@ static u8 halbtc8723b1ant_ActionAlgorithm(struct btc_coexist *pBtCoexist)
pBtCoexist->fBtcGet(pBtCoexist, BTC_GET_BL_HS_OPERATION, &bBtHsOn);
- if (!pBtLinkInfo->bBtLinkExist) {
+ if (!pBtLinkInfo->bBtLinkExist)
return algorithm;
- }
if (pBtLinkInfo->bScoExist)
numOfDiffProfile++;
@@ -530,11 +523,10 @@ static u8 halbtc8723b1ant_ActionAlgorithm(struct btc_coexist *pBtCoexist)
} else if (pBtLinkInfo->bA2dpExist) {
algorithm = BT_8723B_1ANT_COEX_ALGO_A2DP;
} else if (pBtLinkInfo->bPanExist) {
- if (bBtHsOn) {
+ if (bBtHsOn)
algorithm = BT_8723B_1ANT_COEX_ALGO_PANHS;
- } else {
+ else
algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR;
- }
}
}
} else if (numOfDiffProfile == 2) {
@@ -544,27 +536,24 @@ static u8 halbtc8723b1ant_ActionAlgorithm(struct btc_coexist *pBtCoexist)
} else if (pBtLinkInfo->bA2dpExist) {
algorithm = BT_8723B_1ANT_COEX_ALGO_SCO;
} else if (pBtLinkInfo->bPanExist) {
- if (bBtHsOn) {
+ if (bBtHsOn)
algorithm = BT_8723B_1ANT_COEX_ALGO_SCO;
- } else {
+ else
algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
}
} else {
if (pBtLinkInfo->bHidExist && pBtLinkInfo->bA2dpExist) {
algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP;
} else if (pBtLinkInfo->bHidExist && pBtLinkInfo->bPanExist) {
- if (bBtHsOn) {
+ if (bBtHsOn)
algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP;
- } else {
+ else
algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
} else if (pBtLinkInfo->bPanExist && pBtLinkInfo->bA2dpExist) {
- if (bBtHsOn) {
+ if (bBtHsOn)
algorithm = BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS;
- } else {
+ else
algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP;
- }
}
}
} else if (numOfDiffProfile == 3) {
@@ -574,17 +563,15 @@ static u8 halbtc8723b1ant_ActionAlgorithm(struct btc_coexist *pBtCoexist)
} else if (
pBtLinkInfo->bHidExist && pBtLinkInfo->bPanExist
) {
- if (bBtHsOn) {
+ if (bBtHsOn)
algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP;
- } else {
+ else
algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
} else if (pBtLinkInfo->bPanExist && pBtLinkInfo->bA2dpExist) {
- if (bBtHsOn) {
+ if (bBtHsOn)
algorithm = BT_8723B_1ANT_COEX_ALGO_SCO;
- } else {
+ else
algorithm = BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
}
} else {
if (
@@ -592,11 +579,10 @@ static u8 halbtc8723b1ant_ActionAlgorithm(struct btc_coexist *pBtCoexist)
pBtLinkInfo->bPanExist &&
pBtLinkInfo->bA2dpExist
) {
- if (bBtHsOn) {
+ if (bBtHsOn)
algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP;
- } else {
+ else
algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR;
- }
}
}
} else if (numOfDiffProfile >= 3) {
@@ -893,11 +879,10 @@ static void halbtc8723b1ant_SetAntPath(
u1Tmp = pBtCoexist->fBtcRead1Byte(pBtCoexist, 0x49d);
cntBtCalChk++;
- if (u1Tmp & BIT0) {
+ if (u1Tmp & BIT0)
mdelay(50);
- } else {
+ else
break;
- }
}
/* set grant_bt to PTA */
@@ -2015,17 +2000,14 @@ static void halbtc8723b1ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
u32 wifiLinkStatus = 0;
u32 numOfWifiLink = 0;
- if (pBtCoexist->bManualControl) {
+ if (pBtCoexist->bManualControl)
return;
- }
- if (pBtCoexist->bStopCoexDm) {
+ if (pBtCoexist->bStopCoexDm)
return;
- }
- if (pCoexSta->bUnderIps) {
+ if (pCoexSta->bUnderIps)
return;
- }
if (
(BT_8723B_1ANT_BT_STATUS_ACL_BUSY == pCoexDm->btStatus) ||
@@ -2057,9 +2039,9 @@ static void halbtc8723b1ant_RunCoexistMechanism(struct btc_coexist *pBtCoexist)
halbtc8723b1ant_LimitedTx(pBtCoexist, NORMAL_EXEC, 0, 0, 0, 0);
halbtc8723b1ant_LimitedRx(pBtCoexist, NORMAL_EXEC, false, bBtCtrlAggBufSize, aggBufSize);
- if ((pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage)) {
+ if ((pBtLinkInfo->bA2dpExist) && (pCoexSta->bC2hBtInquiryPage))
halbtc8723b1ant_ActionBtInquiry(pBtCoexist);
- } else
+ else
halbtc8723b1ant_ActionWifiMultiPort(pBtCoexist);
return;
@@ -2718,11 +2700,10 @@ void EXhalbtc8723b1ant_LpsNotify(struct btc_coexist *pBtCoexist, u8 type)
if (pBtCoexist->bManualControl || pBtCoexist->bStopCoexDm)
return;
- if (BTC_LPS_ENABLE == type) {
+ if (BTC_LPS_ENABLE == type)
pCoexSta->bUnderLps = true;
- } else if (BTC_LPS_DISABLE == type) {
+ else if (BTC_LPS_DISABLE == type)
pCoexSta->bUnderLps = false;
- }
}
void EXhalbtc8723b1ant_ScanNotify(struct btc_coexist *pBtCoexist, u8 type)
@@ -3029,9 +3010,8 @@ void EXhalbtc8723b1ant_BtInfoNotify(
}
if (pCoexSta->btInfoExt & BIT3) {
- if (!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm) {
+ if (!pBtCoexist->bManualControl && !pBtCoexist->bStopCoexDm)
halbtc8723b1ant_IgnoreWlanAct(pBtCoexist, FORCE_EXEC, false);
- }
} else {
/* BT already NOT ignore Wlan active, do nothing here. */
}
--
2.25.1
next prev parent reply other threads:[~2021-05-16 12:30 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-16 12:29 [PATCH 0/7] Staging: rtl8723bs: fix warnings in HalBtc8723b1Ant.c Desmond Cheong Zhi Xi
2021-05-16 12:29 ` Desmond Cheong Zhi Xi [this message]
2021-05-16 12:29 ` [PATCH 2/7] Staging: rtl8723bs: fix spaces " Desmond Cheong Zhi Xi
2021-05-16 12:29 ` [PATCH 3/7] Staging: rtl8723bs: fix indentation " Desmond Cheong Zhi Xi
2021-05-16 12:29 ` [PATCH 4/7] Staging: rtl8723bs: fix comparison formatting " Desmond Cheong Zhi Xi
2021-05-16 12:29 ` [PATCH 5/7] Staging: rtl8723bs: add missing blank line " Desmond Cheong Zhi Xi
2021-05-16 12:29 ` [PATCH 6/7] Staging: rtl8723bs: fix line continuations " Desmond Cheong Zhi Xi
2021-05-16 12:29 ` [PATCH 7/7] Staging: rtl8723bs: fix block comment " Desmond Cheong Zhi Xi
2021-05-17 10:13 ` Dan Carpenter
2021-05-18 4:00 ` Desmond Cheong Zhi Xi
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