From: "tip-bot2 for H. Peter Anvin (Intel)" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: "H. Peter Anvin (Intel)" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/irq] x86: Add native_[ig]dt_invalidate()
Date: Tue, 25 May 2021 09:29:15 -0000 [thread overview]
Message-ID: <162193495585.29796.365548001305216256.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20210519212154.511983-6-hpa@zytor.com>
The following commit has been merged into the x86/irq branch of tip:
Commit-ID: 283fa3b6483a84aeb62f1b97c2ec7c02eb2f5882
Gitweb: https://git.kernel.org/tip/283fa3b6483a84aeb62f1b97c2ec7c02eb2f5882
Author: H. Peter Anvin (Intel) <hpa@zytor.com>
AuthorDate: Wed, 19 May 2021 14:21:51 -07:00
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Fri, 21 May 2021 12:36:45 +02:00
x86: Add native_[ig]dt_invalidate()
In some places, the native forms of descriptor table invalidation is
required. Rather than open-coding them, add explicitly native functions to
invalidate the GDT and IDT.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20210519212154.511983-6-hpa@zytor.com
---
arch/x86/include/asm/desc.h | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h
index b8429ae..400c178 100644
--- a/arch/x86/include/asm/desc.h
+++ b/arch/x86/include/asm/desc.h
@@ -224,6 +224,26 @@ static inline void store_idt(struct desc_ptr *dtr)
asm volatile("sidt %0":"=m" (*dtr));
}
+static inline void native_gdt_invalidate(void)
+{
+ const struct desc_ptr invalid_gdt = {
+ .address = 0,
+ .size = 0
+ };
+
+ native_load_gdt(&invalid_gdt);
+}
+
+static inline void native_idt_invalidate(void)
+{
+ const struct desc_ptr invalid_idt = {
+ .address = 0,
+ .size = 0
+ };
+
+ native_load_idt(&invalid_idt);
+}
+
/*
* The LTR instruction marks the TSS GDT entry as busy. On 64-bit, the GDT is
* a read-only remapping. To prevent a page fault, the GDT is switched to the
next prev parent reply other threads:[~2021-05-25 9:29 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-19 21:21 [PATCH v3 0/8] x86/irq: trap and interrupt cleanups H. Peter Anvin
2021-05-19 21:21 ` [PATCH v3 1/8] x86/traps: add X86_NR_HW_TRAPS to <asm/trapnr.h> H. Peter Anvin
2021-05-19 22:17 ` Thomas Gleixner
2021-05-19 22:24 ` H. Peter Anvin
2021-05-20 7:10 ` Thomas Gleixner
2021-05-19 21:21 ` [PATCH v3 2/8] x86/irqvector: add NR_EXTERNAL_VECTORS and NR_SYSTEM_VECTORS H. Peter Anvin
2021-05-25 9:29 ` [tip: x86/irq] x86/irq: Add and use " tip-bot2 for H. Peter Anvin (Intel)
2021-05-19 21:21 ` [PATCH v3 3/8] x86/irq: remove unused vectors from <asm/irq_vectors.h> H. Peter Anvin
2021-05-25 9:29 ` [tip: x86/irq] x86/irq: Remove unused vectors defines tip-bot2 for H. Peter Anvin (Intel)
2021-05-19 21:21 ` [PATCH v3 4/8] x86/idt: remove address argument to idt_invalidate() H. Peter Anvin
2021-05-25 9:29 ` [tip: x86/irq] x86/idt: Remove address argument from idt_invalidate() tip-bot2 for H. Peter Anvin (Intel)
2021-05-19 21:21 ` [PATCH v3 5/8] x86/desc: add native_[ig]dt_invalidate() to <asm/desc.h> H. Peter Anvin
2021-05-25 9:29 ` tip-bot2 for H. Peter Anvin (Intel) [this message]
2021-05-19 21:21 ` [PATCH v3 6/8] x86/kexec: set_[gi]dt() -> native_[gi]dt_invalidate() in machine_kexec_*.c H. Peter Anvin
2021-05-25 9:29 ` [tip: x86/irq] x86/kexec: Set_[gi]dt() " tip-bot2 for H. Peter Anvin (Intel)
2021-05-19 21:21 ` [PATCH v3 7/8] x86/irq: WARN_ONCE() if irq_move_cleanup is called on a pending interrupt H. Peter Anvin
2021-05-20 14:00 ` Thomas Gleixner
2021-05-19 21:21 ` [PATCH v3 8/8] x86/irq: merge and functionalize common code in DECLARE/DEFINE_IDTENTRY_* H. Peter Anvin
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