From: "tip-bot2 for Pawan Gupta" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>,
Borislav Petkov <bp@suse.de>,
Thomas Gleixner <tglx@linutronix.de>,
Andi Kleen <ak@linux.intel.com>, Tony Luck <tony.luck@intel.com>,
Neelima Krishnan <neelima.krishnan@intel.com>,
x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/cpu] x86/events/intel: Do not deploy TSX force abort workaround when TSX is deprecated
Date: Tue, 15 Jun 2021 17:14:36 -0000 [thread overview]
Message-ID: <162377727686.19906.13579403063424613180.tip-bot2@tip-bot2> (raw)
In-Reply-To: =?utf-8?q?=3Ce4d410f786946280ced02dd07c74e0a74f1d10cb=2E16237?= =?utf-8?q?04845=2Egit-series=2Epawan=2Ekumar=2Egupta=40linux=2Eintel=2Eco?= =?utf-8?q?m=3E?=
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: ad3c2e174938d72fded674acead42e2464a3b460
Gitweb: https://git.kernel.org/tip/ad3c2e174938d72fded674acead42e2464a3b460
Author: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
AuthorDate: Mon, 14 Jun 2021 14:13:23 -07:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Tue, 15 Jun 2021 17:36:03 +02:00
x86/events/intel: Do not deploy TSX force abort workaround when TSX is deprecated
Earlier workaround added by
400816f60c54 ("perf/x86/intel: Implement support for TSX Force Abort")
for perf counter interactions [1] are not required on some client
systems which received a microcode update that deprecates TSX.
Bypass the perf workaround when such microcode is enumerated.
[1] [ bp: Look for document ID 604224, "Performance Monitoring Impact
of Intel Transactional Synchronization Extension Memory". Since
there's no way for us to have stable links to documents... ]
[ bp: Massage comment. ]
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Tested-by: Neelima Krishnan <neelima.krishnan@intel.com>
Link: https://lkml.kernel.org/r/e4d410f786946280ced02dd07c74e0a74f1d10cb.1623704845.git-series.pawan.kumar.gupta@linux.intel.com
---
arch/x86/events/intel/core.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 2521d03..062bf89 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6015,7 +6015,13 @@ __init int intel_pmu_init(void)
tsx_attr = hsw_tsx_events_attrs;
intel_pmu_pebs_data_source_skl(pmem);
- if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT)) {
+ /*
+ * Processors with CPUID.RTM_ALWAYS_ABORT have TSX deprecated by default.
+ * TSX force abort hooks are not required on these systems. Only deploy
+ * workaround when microcode has not enabled X86_FEATURE_RTM_ALWAYS_ABORT.
+ */
+ if (boot_cpu_has(X86_FEATURE_TSX_FORCE_ABORT) &&
+ !boot_cpu_has(X86_FEATURE_RTM_ALWAYS_ABORT)) {
x86_pmu.flags |= PMU_FL_TFA;
x86_pmu.get_event_constraints = tfa_get_event_constraints;
x86_pmu.enable_all = intel_tfa_pmu_enable_all;
reply other threads:[~2021-06-15 17:14 UTC|newest]
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