[RFC 5/5] RISC-V: Support a new config option for non-coherent DMA

From: Atish Patra <atish.patra@wdc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atish.patra@wdc.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Christoph Hellwig <hch@lst.de>,
	devicetree@vger.kernel.org, Dmitry Vyukov <dvyukov@google.com>,
	Frank Rowand <frowand.list@gmail.com>,
	Guo Ren <guoren@linux.alibaba.com>,
	iommu@lists.linux-foundation.org,
	linux-riscv@lists.infradead.org,
	Marek Szyprowski <m.szyprowski@samsung.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Tobias Klauser <tklauser@distanz.ch>
Subject: [RFC 5/5] RISC-V: Support a new config option for non-coherent DMA
Date: Fri, 23 Jul 2021 14:40:31 -0700	[thread overview]
Message-ID: <20210723214031.3251801-6-atish.patra@wdc.com> (raw)
In-Reply-To: <20210723214031.3251801-1-atish.patra@wdc.com>

In future, there will be more RISC-V platforms with non-coherent DMA.
Instead of selecting all the required config options in every soc, create
a new config that selects all the required configs related non-coherent
DMA.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
---
 arch/riscv/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 8fcceb8eda07..931b283c8ec9 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -209,6 +209,14 @@ config PGTABLE_LEVELS
 config LOCKDEP_SUPPORT
 	def_bool y
 
+config RISCV_DMA_NONCOHERENT
+	bool
+	select ARCH_HAS_DMA_PREP_COHERENT
+	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
+	select ARCH_HAS_SYNC_DMA_FOR_CPU
+	select ARCH_HAS_SETUP_DMA_OPS
+	select DMA_GLOBAL_POOL
+
 source "arch/riscv/Kconfig.socs"
 source "arch/riscv/Kconfig.erratas"
 
-- 
2.31.1

