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From: Fenglin Wu <quic_fenglinw@quicinc.com>
To: <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<sboyd@kernel.org>
Cc: <collinsd@codeaurora.org>, <subbaram@codeaurora.org>,
	<quic_fenglinw@quicinc.com>,
	Ashay Jaiswal <ashayj@codeaurora.org>
Subject: [PATCH V1 4/9] spmi: pmic-arb: add support to dispatch interrupt based on IRQ status
Date: Thu, 29 Jul 2021 09:12:42 +0800	[thread overview]
Message-ID: <1627521167-18848-5-git-send-email-quic_fenglinw@quicinc.com> (raw)
In-Reply-To: <1627521167-18848-1-git-send-email-quic_fenglinw@quicinc.com>

From: Ashay Jaiswal <ashayj@codeaurora.org>

Current implementation of SPMI arbiter dispatches interrupt based on the
Arbiter's accumulator status, in some cases the accumulator status may
remain zero and the interrupt remains un-handled. Add logic to dispatch
interrupts based Arbiter's IRQ status if the accumulator status is zero.

Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Signed-off-by: David Collins <collinsd@codeaurora.org>
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
---
 drivers/spmi/spmi-pmic-arb.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index c4adc06..59c445b 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -525,12 +525,18 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
 	u8 ee = pmic_arb->ee;
 	u32 status, enable;
 	int i, id, apid;
+	/* status based dispatch */
+	bool acc_valid = false;
+	u32 irq_status = 0;
 
 	chained_irq_enter(chip, desc);
 
 	for (i = first; i <= last; ++i) {
 		status = readl_relaxed(
 				ver_ops->owner_acc_status(pmic_arb, ee, i));
+		if (status)
+			acc_valid = true;
+
 		while (status) {
 			id = ffs(status) - 1;
 			status &= ~BIT(id);
@@ -548,6 +554,28 @@ static void pmic_arb_chained_irq(struct irq_desc *desc)
 		}
 	}
 
+	/* ACC_STATUS is empty but IRQ fired check IRQ_STATUS */
+	if (!acc_valid) {
+		for (i = pmic_arb->min_apid; i <= pmic_arb->max_apid; i++) {
+			/* skip if APPS is not irq owner */
+			if (pmic_arb->apid_data[i].irq_ee != pmic_arb->ee)
+				continue;
+
+			irq_status = readl_relaxed(
+					     ver_ops->irq_status(pmic_arb, i));
+			if (irq_status) {
+				enable = readl_relaxed(
+					     ver_ops->acc_enable(pmic_arb, i));
+				if (enable & SPMI_PIC_ACC_ENABLE_BIT) {
+					dev_dbg(&pmic_arb->spmic->dev,
+						"Dispatching IRQ for apid=%d status=%x\n",
+						i, irq_status);
+					periph_interrupt(pmic_arb, i);
+				}
+			}
+		}
+	}
+
 	chained_irq_exit(chip, desc);
 }
 
-- 
Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.


  parent reply	other threads:[~2021-07-29  1:14 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-29  1:12 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
2021-07-29  1:12 ` [PATCH V1 1/9] spmi: pmic-arb: add a print in cleanup_irq Fenglin Wu
2021-07-29  1:12 ` [PATCH V1 2/9] spmi: pmic-arb: do not ack and clear peripheral interrupts " Fenglin Wu
2021-07-29  1:12 ` [PATCH V1 3/9] spmi: pmic-arb: check apid against limits before calling irq handler Fenglin Wu
2021-07-29  1:12 ` Fenglin Wu [this message]
2021-07-29  1:12 ` [PATCH V1 5/9] spmi: pmic-arb: correct duplicate APID to PPID mapping logic Fenglin Wu
2021-07-29  1:12 ` [PATCH V1 6/9] spmi: pmic-arb: block access for invalid PMIC arbiter v5 SPMI writes Fenglin Wu
2021-07-29  1:12 ` [PATCH V1 7/9] spmi: pmic-arb: support updating interrupt type flags Fenglin Wu
2021-07-29  1:12 ` [PATCH V1 8/9] spmi: pmic-arb: make interrupt support optional Fenglin Wu
2021-07-29  1:12 ` [PATCH V1 9/9] spmi: pmic-arb: increase SPMI transaction timeout delay Fenglin Wu
2021-08-20  4:57 [PATCH V1 0/9] A bunch of fix and optimization patches in spmi-pmic-arb.c Fenglin Wu
2021-08-20  4:57 ` [PATCH V1 4/9] spmi: pmic-arb: add support to dispatch interrupt based on IRQ status Fenglin Wu

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