x86: Reenable TSC sync check at boot, even with NONSTOP_TSC
diff mbox series

Message ID 20091217202702.GA18015@linux-os.sc.intel.com
State New, archived
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Series
  • x86: Reenable TSC sync check at boot, even with NONSTOP_TSC
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Commit Message

tip-bot for Pallipadi, Venkatesh Dec. 17, 2009, 8:27 p.m. UTC
Commit 83ce4009 did the following change
If the TSC is constant and non-stop, also set it reliable.

But, there seems to be few systems that will end up with TSC warp across
sockets, depending on how the cpus come out of reset. Skipping TSC sync
test on such systems may result in time inconsistency later.

So, reenable TSC sync test even on constant and non-stop TSC systems.
Set, sched_clock_stable to 1 by default and reset it in
mark_tsc_unstable, if TSC sync fails.

This change still gives perf benefit mentioned in 83ce4009 for systems
where TSC is reliable.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
---
 arch/x86/kernel/cpu/intel.c |    1 -
 arch/x86/kernel/tsc.c       |    1 +
 2 files changed, 1 insertions(+), 1 deletions(-)

Comments

tip-bot for Suresh Siddha Dec. 17, 2009, 9 p.m. UTC | #1
On Thu, 2009-12-17 at 13:27 -0700, Pallipadi, Venkatesh wrote:
> Commit 83ce4009 did the following change
> If the TSC is constant and non-stop, also set it reliable.
> 
> But, there seems to be few systems that will end up with TSC warp across
> sockets, depending on how the cpus come out of reset. Skipping TSC sync
> test on such systems may result in time inconsistency later.
> 
> So, reenable TSC sync test even on constant and non-stop TSC systems.
> Set, sched_clock_stable to 1 by default and reset it in
> mark_tsc_unstable, if TSC sync fails.
> 
> This change still gives perf benefit mentioned in 83ce4009 for systems
> where TSC is reliable.
> 
> Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>

Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>

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Patch
diff mbox series

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 9c31e8b..879666f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -70,7 +70,6 @@  static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 	if (c->x86_power & (1 << 8)) {
 		set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
 		set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
-		set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
 		sched_clock_stable = 1;
 	}
 
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index cd982f4..597683a 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -763,6 +763,7 @@  void mark_tsc_unstable(char *reason)
 {
 	if (!tsc_unstable) {
 		tsc_unstable = 1;
+		sched_clock_stable = 0;
 		printk(KERN_INFO "Marking TSC unstable due to %s\n", reason);
 		/* Change only the rating, when not registered */
 		if (clocksource_tsc.mult)