linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: David John <davidjon@xenontk.org>
To: jbarnes@virtuousgeek.org, yakui.zhao@intel.com
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH] Disable SR when more than one pipe is enabled
Date: Wed, 27 Jan 2010 15:19:08 +0530	[thread overview]
Message-ID: <1264585748-16929-1-BlackWidow-davidjon@xenontk.org> (raw)
In-Reply-To: <4B60080E.2000508@xenontk.org>

Self Refresh should be disabled on dual plane configs.
Otherwise, as the SR watermark is not calculated for
such configs, switching to non VGA mode causes FIFO
underrun and display flicker.

This fixes Korg Bug # 14897.

Signed-off-by: David John <davidjon@xenontk.org>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 45da78e..46d7c0c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2519,6 +2519,10 @@ static void g4x_update_wm(struct drm_device *dev,  int planea_clock,
 		sr_entries = roundup(sr_entries / cacheline_size, 1);
 		DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
 		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
+	} else {
+		/* Turn off self refresh if both pipes are enabled */
+		I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
+					& ~FW_BLC_SELF_EN);
 	}
 
 	DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
@@ -2562,6 +2566,10 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
 			srwm = 1;
 		srwm &= 0x3f;
 		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
+	} else {
+		/* Turn off self refresh if both pipes are enabled */
+		I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
+					& ~FW_BLC_SELF_EN);
 	}
 
 	DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n",
@@ -2630,6 +2638,10 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
 		if (srwm < 0)
 			srwm = 1;
 		I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
+	} else {
+		/* Turn off self refresh if both pipes are enabled */
+		I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
+					& ~FW_BLC_SELF_EN);
 	}
 
 	DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",

  reply	other threads:[~2010-01-27  9:49 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-01-27  9:31 Fix For Korg Bug #14897 (GM45 Display Flicker) David John
2010-01-27  9:49 ` David John [this message]
2010-01-27 16:51   ` [PATCH] Disable SR when more than one pipe is enabled Jesse Barnes
2010-01-28  6:58     ` David John
2010-02-04 16:35   ` Eric Anholt
2010-01-27 13:52 ` Fix For Korg Bug #14897 (GM45 Display Flicker) ykzhao
2010-01-27 14:59   ` David John
2010-01-27 16:56     ` Jesse Barnes
2010-01-27 16:48 ` Jesse Barnes

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1264585748-16929-1-BlackWidow-davidjon@xenontk.org \
    --to=davidjon@xenontk.org \
    --cc=jbarnes@virtuousgeek.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=yakui.zhao@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).