[1/2] thermal: exynos: Fix wrong bit to control tmu core
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Message ID 000001cdb65f$bbb93d40$332bb7c0$%choi@samsung.com
State New, archived
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Series
  • [1/2] thermal: exynos: Fix wrong bit to control tmu core
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Commit Message

Jonghwan Choi Oct. 30, 2012, 5:30 a.m. UTC
[0]bit is used to enable/disable tmu core. [1] bit is a reserved bit.

Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
---
 drivers/thermal/exynos_thermal.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

--
1.7.4.1

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Patch
diff mbox series

diff --git a/drivers/thermal/exynos_thermal.c
b/drivers/thermal/exynos_thermal.c
index fd03e85..6ce6667 100644
--- a/drivers/thermal/exynos_thermal.c
+++ b/drivers/thermal/exynos_thermal.c
@@ -53,8 +53,8 @@ 
 #define EXYNOS_TMU_TRIM_TEMP_MASK      0xff
 #define EXYNOS_TMU_GAIN_SHIFT          8
 #define EXYNOS_TMU_REF_VOLTAGE_SHIFT   24
-#define EXYNOS_TMU_CORE_ON             3
-#define EXYNOS_TMU_CORE_OFF            2
+#define EXYNOS_TMU_CORE_ON             1
+#define EXYNOS_TMU_CORE_OFF            0
 #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET     50

 /* Exynos4210 specific registers */