[PATCHv4,2/3] ARM: msm: Add support for APQ8074 Dragonboard
diff mbox series

Message ID 1379992406-3541-2-git-send-email-rvaswani@codeaurora.org
State New, archived
Headers show
Series
  • Untitled series #186679
Related show

Commit Message

Rohit Vaswani Sept. 24, 2013, 3:13 a.m. UTC
This patch adds basic board support for APQ8074 Dragonboard
which belongs to the Snapdragon 800 family.
For now, just support a basic machine with device tree.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
---
 arch/arm/Kconfig.debug                         |  9 +++++++
 arch/arm/boot/dts/Makefile                     |  3 ++-
 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts |  6 +++++
 arch/arm/boot/dts/qcom-msm8974.dtsi            | 35 ++++++++++++++++++++++++++
 arch/arm/include/debug/msm.S                   |  5 ++++
 arch/arm/mach-msm/Kconfig                      | 13 ++++++++++
 arch/arm/mach-msm/board-dt.c                   |  9 +++++++
 7 files changed, 79 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
 create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi

Comments

Kumar Gala Sept. 25, 2013, 7:49 p.m. UTC | #1
On Sep 23, 2013, at 10:13 PM, Rohit Vaswani wrote:

> This patch adds basic board support for APQ8074 Dragonboard
> which belongs to the Snapdragon 800 family.
> For now, just support a basic machine with device tree.
> 
> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
> ---
> arch/arm/Kconfig.debug                         |  9 +++++++
> arch/arm/boot/dts/Makefile                     |  3 ++-
> arch/arm/boot/dts/qcom-apq8074-dragonboard.dts |  6 +++++
> arch/arm/boot/dts/qcom-msm8974.dtsi            | 35 ++++++++++++++++++++++++++
> arch/arm/include/debug/msm.S                   |  5 ++++
> arch/arm/mach-msm/Kconfig                      | 13 ++++++++++
> arch/arm/mach-msm/board-dt.c                   |  9 +++++++
> 7 files changed, 79 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi
> 
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index e18a6fc..959b2c7 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -357,6 +357,15 @@ choice
> 		  Say Y here if you want the debug print routines to direct
> 		  their output to the serial port on MSM 8960 devices.
> 
> +	config DEBUG_MSM8974_UART
> +		bool "Kernel low-level debugging messages via MSM 8974 UART"
> +		depends on ARCH_MSM8974
> +		select MSM_HAS_DEBUG_UART_HS
> +		select DEBUG_MSM_UART
> +		help
> +		  Say Y here if you want the debug print routines to direct
> +		  their output to the serial port on MSM 8974 devices.
> +

A little surprised you didn't pull this and the ARCH_MSM8974 into its own patch outside of this patch being board support.

> 	config DEBUG_MVEBU_UART
> 		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
> 		depends on ARCH_MVEBU
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 000cf76..e71a3ec 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -102,7 +102,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
> 	kirkwood-openblocks_a6.dtb
> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
> -	msm8960-cdp.dtb
> +	msm8960-cdp.dtb \
> +	qcom-apq8074-dragonboard.dtb
> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
> 	armada-370-mirabox.dtb \
> 	armada-370-netgear-rn102.dtb \
> diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> new file mode 100644
> index 0000000..bb6f3c4
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> @@ -0,0 +1,6 @@
> +/include/ "qcom-msm8974.dtsi"
> +
> +/ {
> +	model = "Qualcomm APQ8074 Dragonboard";
> +	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
> +};
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> new file mode 100644
> index 0000000..f04b643
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
> @@ -0,0 +1,35 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	model = "Qualcomm MSM8974";
> +	compatible = "qcom,msm8974";
> +	interrupt-parent = <&intc>;
> +
> +	soc: soc { };

We should have a unit address here:

	  soc: soc@FOOBAR {

also, split out the curly braces so any future patches do have to muck with that.

	};


> +};
> +
> +&soc {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	ranges;
> +	compatible = "simple-bus";
> +
> +	intc: interrupt-controller@f9000000 {
> +		compatible = "qcom,msm-qgic2";
> +		interrupt-controller;
> +		#interrupt-cells = <3>;
> +		reg = <0xf9000000 0x1000>,
> +		      <0xf9002000 0x1000>;
> +	};
> +
> +	timer {
> +		compatible = "arm,armv7-timer";
> +		interrupts = <1 2 0xf08>,
> +			     <1 3 0xf08>,
> +			     <1 4 0xf08>,
> +			     <1 1 0xf08>;
> +		clock-frequency = <19200000>;
> +	};
> +};
> diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
> index 9166e1b..9d653d4 100644
> --- a/arch/arm/include/debug/msm.S
> +++ b/arch/arm/include/debug/msm.S
> @@ -46,6 +46,11 @@
> #define MSM_DEBUG_UART_PHYS	0x16440000
> #endif
> 
> +#ifdef CONFIG_DEBUG_MSM8974_UART
> +#define MSM_DEBUG_UART_BASE	0xFA71E000
> +#define MSM_DEBUG_UART_PHYS	0xF991E000
> +#endif
> +
> 	.macro	addruart, rp, rv, tmp
> #ifdef MSM_DEBUG_UART_PHYS
> 	ldr	\rp, =MSM_DEBUG_UART_PHYS
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 2586c28..086bcb9 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
> @@ -64,6 +64,19 @@ config ARCH_MSM_DT
> 	select SPARSE_IRQ
> 	select USE_OF
> 
> +config ARCH_MSM8974
> +	bool "MSM8974"
> +	select ARM_GIC
> +	select CPU_V7
> +	select HAVE_ARM_ARCH_TIMER
> +	select HAVE_SMP
> +	select MSM_SCM if SMP
> +	select USE_OF
> +
> +config ARCH_MSM_DT
> +	def_bool y
> +	depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
> +
> config MSM_HAS_DEBUG_UART_HS
> 	bool
> 
> diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
> index 266a280..5211e80 100644
> --- a/arch/arm/mach-msm/board-dt.c
> +++ b/arch/arm/mach-msm/board-dt.c
> @@ -26,7 +26,16 @@ static const char * const msm_dt_match[] __initconst = {
> 	NULL
> };
> 
> +static const char * const apq8074_dt_match[] __initconst = {
> +	"qcom,apq8074-dragonboard",
> +	NULL
> +};
> +
> DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
> 	.smp = smp_ops(msm_smp_ops),
> 	.dt_compat = msm_dt_match,
> MACHINE_END
> +
> +DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)")
> +	.dt_compat = apq8074_dt_match,
> +MACHINE_END
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
> 
> --
> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
Rohit Vaswani Sept. 25, 2013, 10:35 p.m. UTC | #2
On 9/25/2013 12:49 PM, Kumar Gala wrote:
> On Sep 23, 2013, at 10:13 PM, Rohit Vaswani wrote:
>
>> This patch adds basic board support for APQ8074 Dragonboard
>> which belongs to the Snapdragon 800 family.
>> For now, just support a basic machine with device tree.
>>
>> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
>> ---
>> arch/arm/Kconfig.debug                         |  9 +++++++
>> arch/arm/boot/dts/Makefile                     |  3 ++-
>> arch/arm/boot/dts/qcom-apq8074-dragonboard.dts |  6 +++++
>> arch/arm/boot/dts/qcom-msm8974.dtsi            | 35 ++++++++++++++++++++++++++
>> arch/arm/include/debug/msm.S                   |  5 ++++
>> arch/arm/mach-msm/Kconfig                      | 13 ++++++++++
>> arch/arm/mach-msm/board-dt.c                   |  9 +++++++
>> 7 files changed, 79 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>> create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi
>>
>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>> index e18a6fc..959b2c7 100644
>> --- a/arch/arm/Kconfig.debug
>> +++ b/arch/arm/Kconfig.debug
>> @@ -357,6 +357,15 @@ choice
>> 		  Say Y here if you want the debug print routines to direct
>> 		  their output to the serial port on MSM 8960 devices.
>>
>> +	config DEBUG_MSM8974_UART
>> +		bool "Kernel low-level debugging messages via MSM 8974 UART"
>> +		depends on ARCH_MSM8974
>> +		select MSM_HAS_DEBUG_UART_HS
>> +		select DEBUG_MSM_UART
>> +		help
>> +		  Say Y here if you want the debug print routines to direct
>> +		  their output to the serial port on MSM 8974 devices.
>> +
> A little surprised you didn't pull this and the ARCH_MSM8974 into its own patch outside of this patch being board support.

Well, its good to have this as part of initial board setup for earlyprintk.

>
>> 	config DEBUG_MVEBU_UART
>> 		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
>> 		depends on ARCH_MVEBU
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 000cf76..e71a3ec 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -102,7 +102,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
>> 	kirkwood-openblocks_a6.dtb
>> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>> -	msm8960-cdp.dtb
>> +	msm8960-cdp.dtb \
>> +	qcom-apq8074-dragonboard.dtb
>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>> 	armada-370-mirabox.dtb \
>> 	armada-370-netgear-rn102.dtb \
>> diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>> new file mode 100644
>> index 0000000..bb6f3c4
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>> @@ -0,0 +1,6 @@
>> +/include/ "qcom-msm8974.dtsi"
>> +
>> +/ {
>> +	model = "Qualcomm APQ8074 Dragonboard";
>> +	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>> +};
>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> new file mode 100644
>> index 0000000..f04b643
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> @@ -0,0 +1,35 @@
>> +/dts-v1/;
>> +
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> +	model = "Qualcomm MSM8974";
>> +	compatible = "qcom,msm8974";
>> +	interrupt-parent = <&intc>;
>> +
>> +	soc: soc { };
> We should have a unit address here:
>
> 	  soc: soc@FOOBAR {
>
> also, split out the curly braces so any future patches do have to muck with that.
>
> 	};
>

Im not sure I understand the reasoning behind the unit address for soc ?
>> +};
>> +
>> +&soc {
>> +	#address-cells = <1>;
>> +	#size-cells = <1>;
>> +	ranges;
>> +	compatible = "simple-bus";
>> +
>> +	intc: interrupt-controller@f9000000 {
>> +		compatible = "qcom,msm-qgic2";
>> +		interrupt-controller;
>> +		#interrupt-cells = <3>;
>> +		reg = <0xf9000000 0x1000>,
>> +		      <0xf9002000 0x1000>;
>> +	};
>> +
>> +	timer {
>> +		compatible = "arm,armv7-timer";
>> +		interrupts = <1 2 0xf08>,
>> +			     <1 3 0xf08>,
>> +			     <1 4 0xf08>,
>> +			     <1 1 0xf08>;
>> +		clock-frequency = <19200000>;
>> +	};
>> +};
>> diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
>> index 9166e1b..9d653d4 100644
>> --- a/arch/arm/include/debug/msm.S
>> +++ b/arch/arm/include/debug/msm.S
>> @@ -46,6 +46,11 @@
>> #define MSM_DEBUG_UART_PHYS	0x16440000
>> #endif
>>
>> +#ifdef CONFIG_DEBUG_MSM8974_UART
>> +#define MSM_DEBUG_UART_BASE	0xFA71E000
>> +#define MSM_DEBUG_UART_PHYS	0xF991E000
>> +#endif
>> +
>> 	.macro	addruart, rp, rv, tmp
>> #ifdef MSM_DEBUG_UART_PHYS
>> 	ldr	\rp, =MSM_DEBUG_UART_PHYS
>> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
>> index 2586c28..086bcb9 100644
>> --- a/arch/arm/mach-msm/Kconfig
>> +++ b/arch/arm/mach-msm/Kconfig
>> @@ -64,6 +64,19 @@ config ARCH_MSM_DT
>> 	select SPARSE_IRQ
>> 	select USE_OF
>>
>> +config ARCH_MSM8974
>> +	bool "MSM8974"
>> +	select ARM_GIC
>> +	select CPU_V7
>> +	select HAVE_ARM_ARCH_TIMER
>> +	select HAVE_SMP
>> +	select MSM_SCM if SMP
>> +	select USE_OF
>> +
>> +config ARCH_MSM_DT
>> +	def_bool y
>> +	depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
>> +
>> config MSM_HAS_DEBUG_UART_HS
>> 	bool
>>
>> diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
>> index 266a280..5211e80 100644
>> --- a/arch/arm/mach-msm/board-dt.c
>> +++ b/arch/arm/mach-msm/board-dt.c
>> @@ -26,7 +26,16 @@ static const char * const msm_dt_match[] __initconst = {
>> 	NULL
>> };
>>
>> +static const char * const apq8074_dt_match[] __initconst = {
>> +	"qcom,apq8074-dragonboard",
>> +	NULL
>> +};
>> +
>> DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
>> 	.smp = smp_ops(msm_smp_ops),
>> 	.dt_compat = msm_dt_match,
>> MACHINE_END
>> +
>> +DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)")
>> +	.dt_compat = apq8074_dt_match,
>> +MACHINE_END
>> -- 
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>> hosted by The Linux Foundation
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html


Thanks,
Rohit Vaswani
Kumar Gala Sept. 26, 2013, 4:37 p.m. UTC | #3
On Sep 25, 2013, at 5:35 PM, Rohit Vaswani wrote:

> On 9/25/2013 12:49 PM, Kumar Gala wrote:
>> On Sep 23, 2013, at 10:13 PM, Rohit Vaswani wrote:
>> 
>>> This patch adds basic board support for APQ8074 Dragonboard
>>> which belongs to the Snapdragon 800 family.
>>> For now, just support a basic machine with device tree.
>>> 
>>> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
>>> ---
>>> arch/arm/Kconfig.debug                         |  9 +++++++
>>> arch/arm/boot/dts/Makefile                     |  3 ++-
>>> arch/arm/boot/dts/qcom-apq8074-dragonboard.dts |  6 +++++
>>> arch/arm/boot/dts/qcom-msm8974.dtsi            | 35 ++++++++++++++++++++++++++
>>> arch/arm/include/debug/msm.S                   |  5 ++++
>>> arch/arm/mach-msm/Kconfig                      | 13 ++++++++++
>>> arch/arm/mach-msm/board-dt.c                   |  9 +++++++
>>> 7 files changed, 79 insertions(+), 1 deletion(-)
>>> create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>>> create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi
>>> 
>>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>>> index e18a6fc..959b2c7 100644
>>> --- a/arch/arm/Kconfig.debug
>>> +++ b/arch/arm/Kconfig.debug
>>> @@ -357,6 +357,15 @@ choice
>>> 		  Say Y here if you want the debug print routines to direct
>>> 		  their output to the serial port on MSM 8960 devices.
>>> 
>>> +	config DEBUG_MSM8974_UART
>>> +		bool "Kernel low-level debugging messages via MSM 8974 UART"
>>> +		depends on ARCH_MSM8974
>>> +		select MSM_HAS_DEBUG_UART_HS
>>> +		select DEBUG_MSM_UART
>>> +		help
>>> +		  Say Y here if you want the debug print routines to direct
>>> +		  their output to the serial port on MSM 8974 devices.
>>> +
>> A little surprised you didn't pull this and the ARCH_MSM8974 into its own patch outside of this patch being board support.
> 
> Well, its good to have this as part of initial board setup for earlyprintk.

I agree, just figured it would have been a standalone patch and a precursor to this patch.

>>> 	config DEBUG_MVEBU_UART
>>> 		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
>>> 		depends on ARCH_MVEBU
>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>> index 000cf76..e71a3ec 100644
>>> --- a/arch/arm/boot/dts/Makefile
>>> +++ b/arch/arm/boot/dts/Makefile
>>> @@ -102,7 +102,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
>>> 	kirkwood-openblocks_a6.dtb
>>> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>> -	msm8960-cdp.dtb
>>> +	msm8960-cdp.dtb \
>>> +	qcom-apq8074-dragonboard.dtb
>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>> 	armada-370-mirabox.dtb \
>>> 	armada-370-netgear-rn102.dtb \
>>> diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>>> new file mode 100644
>>> index 0000000..bb6f3c4
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>>> @@ -0,0 +1,6 @@
>>> +/include/ "qcom-msm8974.dtsi"
>>> +
>>> +/ {
>>> +	model = "Qualcomm APQ8074 Dragonboard";
>>> +	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>>> +};
>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> new file mode 100644
>>> index 0000000..f04b643
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> @@ -0,0 +1,35 @@
>>> +/dts-v1/;
>>> +
>>> +/include/ "skeleton.dtsi"
>>> +
>>> +/ {
>>> +	model = "Qualcomm MSM8974";
>>> +	compatible = "qcom,msm8974";
>>> +	interrupt-parent = <&intc>;
>>> +
>>> +	soc: soc { };
>> We should have a unit address here:
>> 
>> 	  soc: soc@FOOBAR {
>> 
>> also, split out the curly braces so any future patches do have to muck with that.
>> 
>> 	};
>> 
> 
> Im not sure I understand the reasoning behind the unit address for soc ?

Its fairly standard practice and there is a fair amount of discussion about the lack of a unit address for memory nodes.



>>> +};
>>> +
>>> +&soc {
>>> +	#address-cells = <1>;
>>> +	#size-cells = <1>;
>>> +	ranges;
>>> +	compatible = "simple-bus";
>>> +
>>> +	intc: interrupt-controller@f9000000 {
>>> +		compatible = "qcom,msm-qgic2";
>>> +		interrupt-controller;
>>> +		#interrupt-cells = <3>;
>>> +		reg = <0xf9000000 0x1000>,
>>> +		      <0xf9002000 0x1000>;
>>> +	};
>>> +
>>> +	timer {
>>> +		compatible = "arm,armv7-timer";
>>> +		interrupts = <1 2 0xf08>,
>>> +			     <1 3 0xf08>,
>>> +			     <1 4 0xf08>,
>>> +			     <1 1 0xf08>;
>>> +		clock-frequency = <19200000>;
>>> +	};
>>> +};

- k
Rohit Vaswani Sept. 26, 2013, 6:05 p.m. UTC | #4
On 9/26/2013 9:37 AM, Kumar Gala wrote:
> <snip>

> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> @@ -0,0 +1,6 @@
> +/include/ "qcom-msm8974.dtsi"
> +
> +/ {
> +	model = "Qualcomm APQ8074 Dragonboard";
> +	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
> +};
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> new file mode 100644
> index 0000000..f04b643
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
> @@ -0,0 +1,35 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	model = "Qualcomm MSM8974";
> +	compatible = "qcom,msm8974";
> +	interrupt-parent = <&intc>;
> +
> +	soc: soc { };
>>> We should have a unit address here:
>>>
>>> 	  soc: soc@FOOBAR {
>>>
>>> also, split out the curly braces so any future patches do have to muck with that.
>>>
>>> 	};
>>>
>> Im not sure I understand the reasoning behind the unit address for soc ?
> Its fairly standard practice and there is a fair amount of discussion about the lack of a unit address for memory nodes.
>
That still doesn't really answer anything :) - and I couldn't find any 
discussions about this either.
I don't see anybody in upstream adding an address to soc except sun.
What is that address supposed to be for - what does it mean ?
The soc is way of encapsulating meaningful blocks  for the particular SoC.

>
>>>> +};
>>>> +
>>>> +&soc {
>>>> +	#address-cells = <1>;
>>>> +	#size-cells = <1>;
>>>> +	ranges;
>>>> +	compatible = "simple-bus";
>>>> +
>>>> +	intc: interrupt-controller@f9000000 {
>>>> +		compatible = "qcom,msm-qgic2";
>>>> +		interrupt-controller;
>>>> +		#interrupt-cells = <3>;
>>>> +		reg = <0xf9000000 0x1000>,
>>>> +		      <0xf9002000 0x1000>;
>>>> +	};
>>>> +
>>>> +	timer {
>>>> +		compatible = "arm,armv7-timer";
>>>> +		interrupts = <1 2 0xf08>,
>>>> +			     <1 3 0xf08>,
>>>> +			     <1 4 0xf08>,
>>>> +			     <1 1 0xf08>;
>>>> +		clock-frequency = <19200000>;
>>>> +	};
>>>> +};
> - k
>


Thanks,
Rohit Vaswani
Rohit Vaswani Sept. 26, 2013, 7:17 p.m. UTC | #5
On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>> <snip>
>
>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>> @@ -0,0 +1,6 @@
>> +/include/ "qcom-msm8974.dtsi"
>> +
>> +/ {
>> +    model = "Qualcomm APQ8074 Dragonboard";
>> +    compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>> +};
>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi 
>> b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> new file mode 100644
>> index 0000000..f04b643
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> @@ -0,0 +1,35 @@
>> +/dts-v1/;
>> +
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> +    model = "Qualcomm MSM8974";
>> +    compatible = "qcom,msm8974";
>> +    interrupt-parent = <&intc>;
>> +
>> +    soc: soc { };
>>>> We should have a unit address here:
>>>>
>>>>       soc: soc@FOOBAR {
>>>>
>>>> also, split out the curly braces so any future patches do have to 
>>>> muck with that.
>>>>
>>>>     };
>>>>
>>> Im not sure I understand the reasoning behind the unit address for 
>>> soc ?
>> Its fairly standard practice and there is a fair amount of discussion 
>> about the lack of a unit address for memory nodes.
>>
> That still doesn't really answer anything :) - and I couldn't find any 
> discussions about this either.
> I don't see anybody in upstream adding an address to soc except sun.
> What is that address supposed to be for - what does it mean ?
> The soc is way of encapsulating meaningful blocks  for the particular 
> SoC.

I see the mail from Stephen Warren for adding a check stating that

"ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that any
node that has a reg property must include a unit address in its name
with value matching the first entry in its reg property. Conversely, if
a node does not have a reg property, the node name must not include a
unit address."

The soc node we have does not have a reg property ?


>
>>
>>>>> +};
>>>>> +
>>>>> +&soc {
>>>>> +    #address-cells = <1>;
>>>>> +    #size-cells = <1>;
>>>>> +    ranges;
>>>>> +    compatible = "simple-bus";
>>>>> +
>>>>> +    intc: interrupt-controller@f9000000 {
>>>>> +        compatible = "qcom,msm-qgic2";
>>>>> +        interrupt-controller;
>>>>> +        #interrupt-cells = <3>;
>>>>> +        reg = <0xf9000000 0x1000>,
>>>>> +              <0xf9002000 0x1000>;
>>>>> +    };
>>>>> +
>>>>> +    timer {
>>>>> +        compatible = "arm,armv7-timer";
>>>>> +        interrupts = <1 2 0xf08>,
>>>>> +                 <1 3 0xf08>,
>>>>> +                 <1 4 0xf08>,
>>>>> +                 <1 1 0xf08>;
>>>>> +        clock-frequency = <19200000>;
>>>>> +    };
>>>>> +};
>> - k
>>
>
>
> Thanks,
> Rohit Vaswani
>


Thanks,
Rohit Vaswani
Kumar Gala Sept. 26, 2013, 7:33 p.m. UTC | #6
On Sep 26, 2013, at 2:17 PM, Rohit Vaswani wrote:

> On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
>> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>>> <snip>
>> 
>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>>> @@ -0,0 +1,6 @@
>>> +/include/ "qcom-msm8974.dtsi"
>>> +
>>> +/ {
>>> +    model = "Qualcomm APQ8074 Dragonboard";
>>> +    compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>>> +};
>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> new file mode 100644
>>> index 0000000..f04b643
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> @@ -0,0 +1,35 @@
>>> +/dts-v1/;
>>> +
>>> +/include/ "skeleton.dtsi"
>>> +
>>> +/ {
>>> +    model = "Qualcomm MSM8974";
>>> +    compatible = "qcom,msm8974";
>>> +    interrupt-parent = <&intc>;
>>> +
>>> +    soc: soc { };
>>>>> We should have a unit address here:
>>>>> 
>>>>>      soc: soc@FOOBAR {
>>>>> 
>>>>> also, split out the curly braces so any future patches do have to muck with that.
>>>>> 
>>>>>    };
>>>>> 
>>>> Im not sure I understand the reasoning behind the unit address for soc ?
>>> Its fairly standard practice and there is a fair amount of discussion about the lack of a unit address for memory nodes.
>>> 
>> That still doesn't really answer anything :) - and I couldn't find any discussions about this either.
>> I don't see anybody in upstream adding an address to soc except sun.
>> What is that address supposed to be for - what does it mean ?
>> The soc is way of encapsulating meaningful blocks  for the particular SoC.
> 
> I see the mail from Stephen Warren for adding a check stating that
> 
> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that any
> node that has a reg property must include a unit address in its name
> with value matching the first entry in its reg property. Conversely, if
> a node does not have a reg property, the node name must not include a
> unit address."
> 
> The soc node we have does not have a reg property ?

Not 100% sure what people will decide on this.  There are a number of examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR, but they don't typically have "reg" properties at the soc level.

Let's go ahead w/o the unit address (as you have it) for now.

- k
David Brown Sept. 26, 2013, 8:58 p.m. UTC | #7
On Thu, Sep 26, 2013 at 02:33:53PM -0500, Kumar Gala wrote:

>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that any
>> node that has a reg property must include a unit address in its name
>> with value matching the first entry in its reg property. Conversely, if
>> a node does not have a reg property, the node name must not include a
>> unit address."
>>
>> The soc node we have does not have a reg property ?
>
>Not 100% sure what people will decide on this.  There are a number of
>examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR,
>but they don't typically have "reg" properties at the soc level.
>
>Let's go ahead w/o the unit address (as you have it) for now.

What is the address even supposed to mean?  Are we expecting multiple
'soc' nodes?

David
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/
Kumar Gala Sept. 26, 2013, 9:06 p.m. UTC | #8
On Sep 26, 2013, at 3:58 PM, David Brown wrote:

> On Thu, Sep 26, 2013 at 02:33:53PM -0500, Kumar Gala wrote:
> 
>>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that any
>>> node that has a reg property must include a unit address in its name
>>> with value matching the first entry in its reg property. Conversely, if
>>> a node does not have a reg property, the node name must not include a
>>> unit address."
>>> 
>>> The soc node we have does not have a reg property ?
>> 
>> Not 100% sure what people will decide on this.  There are a number of
>> examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR,
>> but they don't typically have "reg" properties at the soc level.
>> 
>> Let's go ahead w/o the unit address (as you have it) for now.
> 
> What is the address even supposed to mean?  Are we expecting multiple
> 'soc' nodes?


What do we consider to exist under soc in general?  I'd expect the address to be the base of the MMIO register register for on SoC devices (but that's based on my PPC history).

- k
Rob Herring Sept. 26, 2013, 9:10 p.m. UTC | #9
On 09/26/2013 02:33 PM, Kumar Gala wrote:
> 
> On Sep 26, 2013, at 2:17 PM, Rohit Vaswani wrote:
> 
>> On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
>>> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>>>> <snip>
>>> 
>>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -0,0
>>>> +1,6 @@ +/include/ "qcom-msm8974.dtsi" + +/ { +    model =
>>>> "Qualcomm APQ8074 Dragonboard"; +    compatible =
>>>> "qcom,apq8074-dragonboard", "qcom,apq8074"; +}; diff --git
>>>> a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi new file mode 100644 
>>>> index 0000000..f04b643 --- /dev/null +++
>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -0,0 +1,35 @@ 
>>>> +/dts-v1/; + +/include/ "skeleton.dtsi" + +/ { +    model =
>>>> "Qualcomm MSM8974"; +    compatible = "qcom,msm8974"; +
>>>> interrupt-parent = <&intc>; + +    soc: soc { };
>>>>>> We should have a unit address here:
>>>>>> 
>>>>>> soc: soc@FOOBAR {
>>>>>> 
>>>>>> also, split out the curly braces so any future patches do
>>>>>> have to muck with that.
>>>>>> 
>>>>>> };
>>>>>> 
>>>>> Im not sure I understand the reasoning behind the unit
>>>>> address for soc ?
>>>> Its fairly standard practice and there is a fair amount of
>>>> discussion about the lack of a unit address for memory nodes.
>>>> 
>>> That still doesn't really answer anything :) - and I couldn't
>>> find any discussions about this either. I don't see anybody in
>>> upstream adding an address to soc except sun. What is that
>>> address supposed to be for - what does it mean ? The soc is way
>>> of encapsulating meaningful blocks  for the particular SoC.
>> 
>> I see the mail from Stephen Warren for adding a check stating that
>> 
>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that
>> any node that has a reg property must include a unit address in its
>> name with value matching the first entry in its reg property.
>> Conversely, if a node does not have a reg property, the node name
>> must not include a unit address."
>> 
>> The soc node we have does not have a reg property ?
> 
> Not 100% sure what people will decide on this.  There are a number of
> examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR,
> but they don't typically have "reg" properties at the soc level.

No, but you may have a ranges property which is related.

I've just hit this on highbank in needing to add a second bank of
peripherals for midway. So my vote would be to have unit address.

Rob
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/
Kumar Gala Sept. 26, 2013, 9:23 p.m. UTC | #10
On Sep 26, 2013, at 4:10 PM, Rob Herring wrote:

> On 09/26/2013 02:33 PM, Kumar Gala wrote:
>> 
>> On Sep 26, 2013, at 2:17 PM, Rohit Vaswani wrote:
>> 
>>> On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
>>>> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>>>>> <snip>
>>>> 
>>>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -0,0
>>>>> +1,6 @@ +/include/ "qcom-msm8974.dtsi" + +/ { +    model =
>>>>> "Qualcomm APQ8074 Dragonboard"; +    compatible =
>>>>> "qcom,apq8074-dragonboard", "qcom,apq8074"; +}; diff --git
>>>>> a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi new file mode 100644 
>>>>> index 0000000..f04b643 --- /dev/null +++
>>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -0,0 +1,35 @@ 
>>>>> +/dts-v1/; + +/include/ "skeleton.dtsi" + +/ { +    model =
>>>>> "Qualcomm MSM8974"; +    compatible = "qcom,msm8974"; +
>>>>> interrupt-parent = <&intc>; + +    soc: soc { };
>>>>>>> We should have a unit address here:
>>>>>>> 
>>>>>>> soc: soc@FOOBAR {
>>>>>>> 
>>>>>>> also, split out the curly braces so any future patches do
>>>>>>> have to muck with that.
>>>>>>> 
>>>>>>> };
>>>>>>> 
>>>>>> Im not sure I understand the reasoning behind the unit
>>>>>> address for soc ?
>>>>> Its fairly standard practice and there is a fair amount of
>>>>> discussion about the lack of a unit address for memory nodes.
>>>>> 
>>>> That still doesn't really answer anything :) - and I couldn't
>>>> find any discussions about this either. I don't see anybody in
>>>> upstream adding an address to soc except sun. What is that
>>>> address supposed to be for - what does it mean ? The soc is way
>>>> of encapsulating meaningful blocks  for the particular SoC.
>>> 
>>> I see the mail from Stephen Warren for adding a check stating that
>>> 
>>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that
>>> any node that has a reg property must include a unit address in its
>>> name with value matching the first entry in its reg property.
>>> Conversely, if a node does not have a reg property, the node name
>>> must not include a unit address."
>>> 
>>> The soc node we have does not have a reg property ?
>> 
>> Not 100% sure what people will decide on this.  There are a number of
>> examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR,
>> but they don't typically have "reg" properties at the soc level.
> 
> No, but you may have a ranges property which is related.
> 
> I've just hit this on highbank in needing to add a second bank of
> peripherals for midway. So my vote would be to have unit address.
> 
> Rob

So are we saying the rule for needing a unit-address being either 'reg' or 'ranges' ?

- k

Patch
diff mbox series

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e18a6fc..959b2c7 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -357,6 +357,15 @@  choice
 		  Say Y here if you want the debug print routines to direct
 		  their output to the serial port on MSM 8960 devices.
 
+	config DEBUG_MSM8974_UART
+		bool "Kernel low-level debugging messages via MSM 8974 UART"
+		depends on ARCH_MSM8974
+		select MSM_HAS_DEBUG_UART_HS
+		select DEBUG_MSM_UART
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to the serial port on MSM 8974 devices.
+
 	config DEBUG_MVEBU_UART
 		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
 		depends on ARCH_MVEBU
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 000cf76..e71a3ec 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -102,7 +102,8 @@  dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
 	kirkwood-openblocks_a6.dtb
 dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
 dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
-	msm8960-cdp.dtb
+	msm8960-cdp.dtb \
+	qcom-apq8074-dragonboard.dtb
 dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
new file mode 100644
index 0000000..bb6f3c4
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
@@ -0,0 +1,6 @@ 
+/include/ "qcom-msm8974.dtsi"
+
+/ {
+	model = "Qualcomm APQ8074 Dragonboard";
+	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
+};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
new file mode 100644
index 0000000..f04b643
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -0,0 +1,35 @@ 
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+	model = "Qualcomm MSM8974";
+	compatible = "qcom,msm8974";
+	interrupt-parent = <&intc>;
+
+	soc: soc { };
+};
+
+&soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	compatible = "simple-bus";
+
+	intc: interrupt-controller@f9000000 {
+		compatible = "qcom,msm-qgic2";
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		reg = <0xf9000000 0x1000>,
+		      <0xf9002000 0x1000>;
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 2 0xf08>,
+			     <1 3 0xf08>,
+			     <1 4 0xf08>,
+			     <1 1 0xf08>;
+		clock-frequency = <19200000>;
+	};
+};
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9166e1b..9d653d4 100644
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -46,6 +46,11 @@ 
 #define MSM_DEBUG_UART_PHYS	0x16440000
 #endif
 
+#ifdef CONFIG_DEBUG_MSM8974_UART
+#define MSM_DEBUG_UART_BASE	0xFA71E000
+#define MSM_DEBUG_UART_PHYS	0xF991E000
+#endif
+
 	.macro	addruart, rp, rv, tmp
 #ifdef MSM_DEBUG_UART_PHYS
 	ldr	\rp, =MSM_DEBUG_UART_PHYS
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 2586c28..086bcb9 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -64,6 +64,19 @@  config ARCH_MSM_DT
 	select SPARSE_IRQ
 	select USE_OF
 
+config ARCH_MSM8974
+	bool "MSM8974"
+	select ARM_GIC
+	select CPU_V7
+	select HAVE_ARM_ARCH_TIMER
+	select HAVE_SMP
+	select MSM_SCM if SMP
+	select USE_OF
+
+config ARCH_MSM_DT
+	def_bool y
+	depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
+
 config MSM_HAS_DEBUG_UART_HS
 	bool
 
diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
index 266a280..5211e80 100644
--- a/arch/arm/mach-msm/board-dt.c
+++ b/arch/arm/mach-msm/board-dt.c
@@ -26,7 +26,16 @@  static const char * const msm_dt_match[] __initconst = {
 	NULL
 };
 
+static const char * const apq8074_dt_match[] __initconst = {
+	"qcom,apq8074-dragonboard",
+	NULL
+};
+
 DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
 	.smp = smp_ops(msm_smp_ops),
 	.dt_compat = msm_dt_match,
 MACHINE_END
+
+DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)")
+	.dt_compat = apq8074_dt_match,
+MACHINE_END