From: Benson Leung <bleung@chromium.org>
To: wsa@the-dreams.de, mika.westerberg@linux.intel.com,
khali@linux-fr.org, andriy.shevchenko@linux.intel.com,
jacmet@sunsite.dk, linux-i2c@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: dlaurie@chromium.org, bleung@chromium.org
Subject: [PATCH v2 1/2] i2c-designware-pci: Add Haswell ULT device IDs
Date: Mon, 21 Oct 2013 08:05:43 -0700 [thread overview]
Message-ID: <1382367944-3005-2-git-send-email-bleung@chromium.org> (raw)
In-Reply-To: <1382367944-3005-1-git-send-email-bleung@chromium.org>
From: Duncan Laurie <dlaurie@chromium.org>
Add the necessary PCI Device IDs to use the Haswell ULT
I2C controller in PCI mode.
Set the bus numbers to -1 so it will use dynamic assignment
rather than hardcoded.
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Benson Leung <bleung@chromium.org>
---
v2: Changed Haswell bus_clk to 100Mhz, thanks Mika Westerberg.
v1: Initial
---
drivers/i2c/busses/i2c-designware-pcidrv.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index f6ed06c..816cbd1 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -54,6 +54,9 @@ enum dw_pci_ctl_id_t {
medfield_3,
medfield_4,
medfield_5,
+
+ haswell_0,
+ haswell_1,
};
struct dw_pci_controller {
@@ -132,6 +135,20 @@ static struct dw_pci_controller dw_pci_controllers[] = {
.rx_fifo_depth = 32,
.clk_khz = 25000,
},
+ [haswell_0] = {
+ .bus_num = -1,
+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
+ .tx_fifo_depth = 32,
+ .rx_fifo_depth = 32,
+ .clk_khz = 100000,
+ },
+ [haswell_1] = {
+ .bus_num = -1,
+ .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
+ .tx_fifo_depth = 32,
+ .rx_fifo_depth = 32,
+ .clk_khz = 100000,
+ },
};
static struct i2c_algorithm i2c_dw_algo = {
.master_xfer = i2c_dw_xfer,
@@ -321,6 +338,9 @@ static DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = {
{ PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
{ PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
{ PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
+ /* Haswell ULT */
+ { PCI_VDEVICE(INTEL, 0x9c61), haswell_0 },
+ { PCI_VDEVICE(INTEL, 0x9c62), haswell_1 },
{ 0,}
};
MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
--
1.8.3.2
next prev parent reply other threads:[~2013-10-21 15:06 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-21 3:26 [PATCH 0/2] i2c-designware-pci: Add Haswell ULT device support Benson Leung
2013-10-21 3:26 ` [PATCH 1/2] i2c-designware-pci: Add Haswell ULT device IDs Benson Leung
2013-10-21 6:53 ` Mika Westerberg
2013-10-21 14:23 ` Benson Leung
2013-10-21 3:26 ` [PATCH 2/2] i2c-designware-pci: Index Haswell ULT bus names from 0 Benson Leung
2013-10-21 6:58 ` Mika Westerberg
2013-10-21 14:20 ` Benson Leung
2013-10-21 16:12 ` Mika Westerberg
2013-11-14 18:05 ` Wolfram Sang
2013-11-20 2:14 ` Benson Leung
2013-11-26 13:09 ` Wolfram Sang
2014-01-03 15:52 ` Wolfram Sang
2014-01-10 0:12 ` Benson Leung
2014-01-10 7:59 ` Jean Delvare
2014-01-16 19:51 ` Wolfram Sang
2014-01-16 20:14 ` Benson Leung
2013-10-21 15:05 ` [PATCH v2 0/2] i2c-designware-pci: Add Haswell ULT device support Benson Leung
2013-10-21 15:05 ` Benson Leung [this message]
2013-10-21 15:05 ` [PATCH v2 2/2] i2c-designware-pci: Index Haswell ULT bus names from 0 Benson Leung
2013-10-21 16:14 ` [PATCH v2 0/2] i2c-designware-pci: Add Haswell ULT device support Mika Westerberg
2014-04-06 13:54 ` Kirill A. Shutemov
2014-04-06 15:31 ` Wolfram Sang
2014-04-07 9:09 ` Mika Westerberg
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