From: Kever Yang <kever.yang@rock-chips.com>
To: Mike Turquette <mturquette@linaro.org>, Heiko Stuebner <heiko@sntech.de>
Cc: dianders@chromium.org, sonnyrao@chromium.org,
addy.ke@rock-chips.com, cf@rock-chips.com, fzf@rock-chips.com,
ykk@rock-chips.com, yzq@rock-chips.com, dkl@rock-chips.com,
huangtao@rock-chips.com, Kever Yang <kever.yang@rock-chips.com>,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH 5/5] clk: rockchip: change DCLK_VOP0 to use new COMPOSITE_DIVOPS
Date: Tue, 4 Nov 2014 15:52:39 +0800 [thread overview]
Message-ID: <1415087559-19444-6-git-send-email-kever.yang@rock-chips.com> (raw)
In-Reply-To: <1415087559-19444-1-git-send-email-kever.yang@rock-chips.com>
The HDMI clock is actually provide by DCLK_VOP0, so we need this
patch to handle the HDMI clock correctly
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3288.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 0151140..073a719 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -396,8 +396,10 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
RK3288_CLKSEL_CON(30), 14, 2, MFLAGS, 8, 5, DFLAGS,
RK3288_CLKGATE_CON(3), 4, GFLAGS),
- COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
+ COMPOSITE_DIVOPS(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p,
+ (CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT),
RK3288_CLKSEL_CON(27), 0, 2, MFLAGS, 8, 8, DFLAGS,
+ &dclk_vop_ops,
RK3288_CLKGATE_CON(3), 1, GFLAGS),
COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
RK3288_CLKSEL_CON(29), 6, 2, MFLAGS, 8, 8, DFLAGS,
--
1.9.1
next prev parent reply other threads:[~2014-11-04 7:55 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-04 7:52 [PATCH 0/5] clk: rockchip: add full support for HDMI clock on rk3288 Kever Yang
2014-11-04 7:52 ` [PATCH 1/5] clk: rockchip: add some clock rate into rate table for rk3288 Kever Yang
2014-11-04 7:52 ` [PATCH 2/5] clk: divider: make clk_divider_recalc/set_rate available Kever Yang
2014-11-04 7:52 ` [PATCH 3/5] clk: rockchip: introduce the div_ops handling for composite branches Kever Yang
2014-11-04 7:52 ` [PATCH 4/5] clk: rockchip: add the vop_determine_rate for vop dclock Kever Yang
2014-11-04 7:52 ` Kever Yang [this message]
2014-11-06 21:06 ` [PATCH 0/5] clk: rockchip: add full support for HDMI clock on rk3288 Heiko Stübner
2014-11-13 8:52 ` Kever Yang
2014-11-13 22:59 ` Doug Anderson
[not found] ` <20141114014605.25314.49766@quantum>
2014-11-14 8:58 ` Kever Yang
2016-01-19 12:02 ` Tomeu Vizoso
2016-01-20 16:50 ` Doug Anderson
2016-01-21 9:03 ` Tomeu Vizoso
2016-01-21 20:11 ` Doug Anderson
2016-01-22 14:00 ` Tomeu Vizoso
2016-01-22 17:07 ` Doug Anderson
2016-01-26 8:28 ` Tomeu Vizoso
2016-01-26 16:32 ` Doug Anderson
2016-01-27 10:20 ` Tomeu Vizoso
2016-01-27 16:46 ` Doug Anderson
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