From: Stephane Eranian <eranian@google.com>
To: linux-kernel@vger.kernel.org
Cc: acme@redhat.com, peterz@infradead.org, mingo@elte.hu,
ak@linux.intel.com, jolsa@redhat.com, namhyung@kernel.org,
kan.liang@intel.com, dsahern@gmail.com, adrian.hunter@intel.com
Subject: [PATCH] perf record: fix link time error with sample_reg_masks on non x86
Date: Tue, 1 Sep 2015 11:30:14 +0200 [thread overview]
Message-ID: <1441099814-26783-1-git-send-email-eranian@google.com> (raw)
This patch makes perf compile on non x86 platforms by defining
a weak symbol for sample_reg_masks[] in util/perf_regs.c.
The patch also moves the REG() and REG_END() macros into the
util/per_regs.h header file. The macros are renamed to
SMPL_REG/SMPL_REG_END to avoid clashes with other header files.
Signed-off-by: Stephane Eranian <eranian@google.com>
---
tools/perf/arch/x86/util/perf_regs.c | 44 +++++++++++++++++-------------------
tools/perf/util/perf_regs.c | 4 ++++
tools/perf/util/perf_regs.h | 2 ++
3 files changed, 27 insertions(+), 23 deletions(-)
diff --git a/tools/perf/arch/x86/util/perf_regs.c b/tools/perf/arch/x86/util/perf_regs.c
index 087c84e..c5db14f 100644
--- a/tools/perf/arch/x86/util/perf_regs.c
+++ b/tools/perf/arch/x86/util/perf_regs.c
@@ -1,30 +1,28 @@
#include "../../perf.h"
#include "../../util/perf_regs.h"
-#define REG(n, b) { .name = #n, .mask = 1ULL << (b) }
-#define REG_END { .name = NULL }
const struct sample_reg sample_reg_masks[] = {
- REG(AX, PERF_REG_X86_AX),
- REG(BX, PERF_REG_X86_BX),
- REG(CX, PERF_REG_X86_CX),
- REG(DX, PERF_REG_X86_DX),
- REG(SI, PERF_REG_X86_SI),
- REG(DI, PERF_REG_X86_DI),
- REG(BP, PERF_REG_X86_BP),
- REG(SP, PERF_REG_X86_SP),
- REG(IP, PERF_REG_X86_IP),
- REG(FLAGS, PERF_REG_X86_FLAGS),
- REG(CS, PERF_REG_X86_CS),
- REG(SS, PERF_REG_X86_SS),
+ SMPL_REG(AX, PERF_REG_X86_AX),
+ SMPL_REG(BX, PERF_REG_X86_BX),
+ SMPL_REG(CX, PERF_REG_X86_CX),
+ SMPL_REG(DX, PERF_REG_X86_DX),
+ SMPL_REG(SI, PERF_REG_X86_SI),
+ SMPL_REG(DI, PERF_REG_X86_DI),
+ SMPL_REG(BP, PERF_REG_X86_BP),
+ SMPL_REG(SP, PERF_REG_X86_SP),
+ SMPL_REG(IP, PERF_REG_X86_IP),
+ SMPL_REG(FLAGS, PERF_REG_X86_FLAGS),
+ SMPL_REG(CS, PERF_REG_X86_CS),
+ SMPL_REG(SS, PERF_REG_X86_SS),
#ifdef HAVE_ARCH_X86_64_SUPPORT
- REG(R8, PERF_REG_X86_R8),
- REG(R9, PERF_REG_X86_R9),
- REG(R10, PERF_REG_X86_R10),
- REG(R11, PERF_REG_X86_R11),
- REG(R12, PERF_REG_X86_R12),
- REG(R13, PERF_REG_X86_R13),
- REG(R14, PERF_REG_X86_R14),
- REG(R15, PERF_REG_X86_R15),
+ SMPL_REG(R8, PERF_REG_X86_R8),
+ SMPL_REG(R9, PERF_REG_X86_R9),
+ SMPL_REG(R10, PERF_REG_X86_R10),
+ SMPL_REG(R11, PERF_REG_X86_R11),
+ SMPL_REG(R12, PERF_REG_X86_R12),
+ SMPL_REG(R13, PERF_REG_X86_R13),
+ SMPL_REG(R14, PERF_REG_X86_R14),
+ SMPL_REG(R15, PERF_REG_X86_R15),
#endif
- REG_END
+ SMPL_REG_END
};
diff --git a/tools/perf/util/perf_regs.c b/tools/perf/util/perf_regs.c
index 43168fb..885e8ac 100644
--- a/tools/perf/util/perf_regs.c
+++ b/tools/perf/util/perf_regs.c
@@ -2,6 +2,10 @@
#include "perf_regs.h"
#include "event.h"
+const struct sample_reg __weak sample_reg_masks[] = {
+ SMPL_REG_END
+};
+
int perf_reg_value(u64 *valp, struct regs_dump *regs, int id)
{
int i, idx = 0;
diff --git a/tools/perf/util/perf_regs.h b/tools/perf/util/perf_regs.h
index 92c1fff..2984dcc 100644
--- a/tools/perf/util/perf_regs.h
+++ b/tools/perf/util/perf_regs.h
@@ -9,6 +9,8 @@ struct sample_reg {
const char *name;
uint64_t mask;
};
+#define SMPL_REG(n, b) { .name = #n, .mask = 1ULL << (b) }
+#define SMPL_REG_END { .name = NULL }
extern const struct sample_reg sample_reg_masks[];
--
1.9.1
next reply other threads:[~2015-09-01 9:30 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-01 9:30 Stephane Eranian [this message]
2015-09-01 9:56 ` [PATCH] perf record: fix link time error with sample_reg_masks on non x86 Jiri Olsa
2015-09-02 7:28 ` [tip:perf/urgent] perf tools: Fix " tip-bot for Stephane Eranian
2015-09-02 9:46 ` [PATCH] perf record: fix " Adrian Hunter
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