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From: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: marc.zyngier@arm.com, will.deacon@arm.com, mark.rutland@arm.com,
	catalin.marinas@arm.com, steve.capper@linaro.org,
	linux-kernel@vger.kernel.org, andre.przywara@arm.com,
	dave.martin@arm.com, Vladimir.Murzin@arm.com,
	james.morse@arm.com, ard.biesheuvel@linaro.org,
	edward.nevill@linaro.org, aph@redhat.com,
	"Suzuki K. Poulose" <suzuki.poulose@arm.com>
Subject: [PATCH v2 05/22] arm64: Move /proc/cpuinfo handling code
Date: Mon,  5 Oct 2015 18:01:54 +0100	[thread overview]
Message-ID: <1444064531-25607-6-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1444064531-25607-1-git-send-email-suzuki.poulose@arm.com>

This patch moves the /proc/cpuinfo handling code:

arch/arm64/kernel/{setup.c to cpuinfo.c}

No functional changes

Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
---
 arch/arm64/kernel/cpuinfo.c |  124 +++++++++++++++++++++++++++++++++++++++++++
 arch/arm64/kernel/setup.c   |  123 ------------------------------------------
 2 files changed, 124 insertions(+), 123 deletions(-)

diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 8307b33..0dadb69 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -24,8 +24,11 @@
 #include <linux/bug.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/personality.h>
 #include <linux/preempt.h>
 #include <linux/printk.h>
+#include <linux/seq_file.h>
+#include <linux/sched.h>
 #include <linux/smp.h>
 
 /*
@@ -45,6 +48,127 @@ static char *icache_policy_str[] = {
 
 unsigned long __icache_flags;
 
+static const char *hwcap_str[] = {
+	"fp",
+	"asimd",
+	"evtstrm",
+	"aes",
+	"pmull",
+	"sha1",
+	"sha2",
+	"crc32",
+	"atomics",
+	NULL
+};
+
+#ifdef CONFIG_COMPAT
+static const char *compat_hwcap_str[] = {
+	"swp",
+	"half",
+	"thumb",
+	"26bit",
+	"fastmult",
+	"fpa",
+	"vfp",
+	"edsp",
+	"java",
+	"iwmmxt",
+	"crunch",
+	"thumbee",
+	"neon",
+	"vfpv3",
+	"vfpv3d16",
+	"tls",
+	"vfpv4",
+	"idiva",
+	"idivt",
+	"vfpd32",
+	"lpae",
+	"evtstrm"
+};
+
+static const char *compat_hwcap2_str[] = {
+	"aes",
+	"pmull",
+	"sha1",
+	"sha2",
+	"crc32",
+	NULL
+};
+#endif /* CONFIG_COMPAT */
+
+static int c_show(struct seq_file *m, void *v)
+{
+	int i, j;
+
+	for_each_online_cpu(i) {
+		struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, i);
+		u32 midr = cpuinfo->reg_midr;
+
+		/*
+		 * glibc reads /proc/cpuinfo to determine the number of
+		 * online processors, looking for lines beginning with
+		 * "processor".  Give glibc what it expects.
+		 */
+		seq_printf(m, "processor\t: %d\n", i);
+
+		/*
+		 * Dump out the common processor features in a single line.
+		 * Userspace should read the hwcaps with getauxval(AT_HWCAP)
+		 * rather than attempting to parse this, but there's a body of
+		 * software which does already (at least for 32-bit).
+		 */
+		seq_puts(m, "Features\t:");
+		if (personality(current->personality) == PER_LINUX32) {
+#ifdef CONFIG_COMPAT
+			for (j = 0; compat_hwcap_str[j]; j++)
+				if (compat_elf_hwcap & (1 << j))
+					seq_printf(m, " %s", compat_hwcap_str[j]);
+
+			for (j = 0; compat_hwcap2_str[j]; j++)
+				if (compat_elf_hwcap2 & (1 << j))
+					seq_printf(m, " %s", compat_hwcap2_str[j]);
+#endif /* CONFIG_COMPAT */
+		} else {
+			for (j = 0; hwcap_str[j]; j++)
+				if (elf_hwcap & (1 << j))
+					seq_printf(m, " %s", hwcap_str[j]);
+		}
+		seq_puts(m, "\n");
+
+		seq_printf(m, "CPU implementer\t: 0x%02x\n",
+			   MIDR_IMPLEMENTOR(midr));
+		seq_printf(m, "CPU architecture: 8\n");
+		seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr));
+		seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr));
+		seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr));
+	}
+
+	return 0;
+}
+
+static void *c_start(struct seq_file *m, loff_t *pos)
+{
+	return *pos < 1 ? (void *)1 : NULL;
+}
+
+static void *c_next(struct seq_file *m, void *v, loff_t *pos)
+{
+	++*pos;
+	return NULL;
+}
+
+static void c_stop(struct seq_file *m, void *v)
+{
+}
+
+const struct seq_operations cpuinfo_op = {
+	.start	= c_start,
+	.next	= c_next,
+	.stop	= c_stop,
+	.show	= c_show
+};
+
 static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info)
 {
 	unsigned int cpu = smp_processor_id();
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 4c7bca8..7b651cc 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -28,7 +28,6 @@
 #include <linux/console.h>
 #include <linux/cache.h>
 #include <linux/bootmem.h>
-#include <linux/seq_file.h>
 #include <linux/screen_info.h>
 #include <linux/init.h>
 #include <linux/kexec.h>
@@ -44,7 +43,6 @@
 #include <linux/of_fdt.h>
 #include <linux/of_platform.h>
 #include <linux/efi.h>
-#include <linux/personality.h>
 #include <linux/psci.h>
 
 #include <asm/acpi.h>
@@ -383,124 +381,3 @@ static int __init topology_init(void)
 	return 0;
 }
 subsys_initcall(topology_init);
-
-static const char *hwcap_str[] = {
-	"fp",
-	"asimd",
-	"evtstrm",
-	"aes",
-	"pmull",
-	"sha1",
-	"sha2",
-	"crc32",
-	"atomics",
-	NULL
-};
-
-#ifdef CONFIG_COMPAT
-static const char *compat_hwcap_str[] = {
-	"swp",
-	"half",
-	"thumb",
-	"26bit",
-	"fastmult",
-	"fpa",
-	"vfp",
-	"edsp",
-	"java",
-	"iwmmxt",
-	"crunch",
-	"thumbee",
-	"neon",
-	"vfpv3",
-	"vfpv3d16",
-	"tls",
-	"vfpv4",
-	"idiva",
-	"idivt",
-	"vfpd32",
-	"lpae",
-	"evtstrm"
-};
-
-static const char *compat_hwcap2_str[] = {
-	"aes",
-	"pmull",
-	"sha1",
-	"sha2",
-	"crc32",
-	NULL
-};
-#endif /* CONFIG_COMPAT */
-
-static int c_show(struct seq_file *m, void *v)
-{
-	int i, j;
-
-	for_each_online_cpu(i) {
-		struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, i);
-		u32 midr = cpuinfo->reg_midr;
-
-		/*
-		 * glibc reads /proc/cpuinfo to determine the number of
-		 * online processors, looking for lines beginning with
-		 * "processor".  Give glibc what it expects.
-		 */
-		seq_printf(m, "processor\t: %d\n", i);
-
-		/*
-		 * Dump out the common processor features in a single line.
-		 * Userspace should read the hwcaps with getauxval(AT_HWCAP)
-		 * rather than attempting to parse this, but there's a body of
-		 * software which does already (at least for 32-bit).
-		 */
-		seq_puts(m, "Features\t:");
-		if (personality(current->personality) == PER_LINUX32) {
-#ifdef CONFIG_COMPAT
-			for (j = 0; compat_hwcap_str[j]; j++)
-				if (compat_elf_hwcap & (1 << j))
-					seq_printf(m, " %s", compat_hwcap_str[j]);
-
-			for (j = 0; compat_hwcap2_str[j]; j++)
-				if (compat_elf_hwcap2 & (1 << j))
-					seq_printf(m, " %s", compat_hwcap2_str[j]);
-#endif /* CONFIG_COMPAT */
-		} else {
-			for (j = 0; hwcap_str[j]; j++)
-				if (elf_hwcap & (1 << j))
-					seq_printf(m, " %s", hwcap_str[j]);
-		}
-		seq_puts(m, "\n");
-
-		seq_printf(m, "CPU implementer\t: 0x%02x\n",
-			   MIDR_IMPLEMENTOR(midr));
-		seq_printf(m, "CPU architecture: 8\n");
-		seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr));
-		seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr));
-		seq_printf(m, "CPU revision\t: %d\n\n", MIDR_REVISION(midr));
-	}
-
-	return 0;
-}
-
-static void *c_start(struct seq_file *m, loff_t *pos)
-{
-	return *pos < 1 ? (void *)1 : NULL;
-}
-
-static void *c_next(struct seq_file *m, void *v, loff_t *pos)
-{
-	++*pos;
-	return NULL;
-}
-
-static void c_stop(struct seq_file *m, void *v)
-{
-}
-
-const struct seq_operations cpuinfo_op = {
-	.start	= c_start,
-	.next	= c_next,
-	.stop	= c_stop,
-	.show	= c_show
-};
-- 
1.7.9.5


  parent reply	other threads:[~2015-10-05 17:02 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-05 17:01 [PATCH v2 00/22] arm64: Consolidate CPU feature handling Suzuki K. Poulose
2015-10-05 17:01 ` [PATCH v2 01/22] arm64: Make the CPU information more clear Suzuki K. Poulose
2015-10-05 17:01 ` [PATCH v2 02/22] arm64: Delay ELF HWCAP initialisation until all CPUs are up Suzuki K. Poulose
2015-10-05 17:01 ` [PATCH v2 03/22] arm64: Move cpu feature detection code Suzuki K. Poulose
2015-10-05 17:01 ` [PATCH v2 04/22] arm64: Move mixed endian support detection Suzuki K. Poulose
2015-10-05 17:01 ` Suzuki K. Poulose [this message]
2015-10-05 17:01 ` [PATCH v2 06/22] arm64: sys_reg: Define System register encoding Suzuki K. Poulose
2015-10-07 16:36   ` Catalin Marinas
2015-10-07 17:03     ` Suzuki K. Poulose
2015-10-08 14:43       ` Catalin Marinas
2015-10-08 16:13         ` Suzuki K. Poulose
2015-10-05 17:01 ` [PATCH v2 07/22] arm64: Keep track of CPU feature registers Suzuki K. Poulose
2015-10-07 17:16   ` Catalin Marinas
2015-10-08  9:55     ` Suzuki K. Poulose
2015-10-08 15:03       ` Catalin Marinas
2015-10-09 13:00         ` Suzuki K. Poulose
2015-10-12 17:01         ` Suzuki K. Poulose
2015-10-12 17:21           ` Mark Rutland
2015-10-13  9:40             ` Catalin Marinas
2015-10-09 10:56       ` Suzuki K. Poulose
2015-10-09 14:16         ` Catalin Marinas
2015-10-05 17:01 ` [PATCH v2 08/22] arm64: Consolidate CPU Sanity check to CPU Feature infrastructure Suzuki K. Poulose
2015-10-05 17:01 ` [PATCH v2 09/22] arm64: Read system wide CPUID value Suzuki K. Poulose
2015-10-05 17:01 ` [PATCH v2 10/22] arm64: Cleanup mixed endian support detection Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 11/22] arm64: Populate cpuinfo after notify_cpu_starting Suzuki K. Poulose
2015-10-08 10:15   ` Catalin Marinas
2015-10-08 10:46     ` Suzuki K. Poulose
2015-10-09 15:01       ` Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 12/22] arm64: Delay cpu feature checks Suzuki K. Poulose
2015-10-06  4:41   ` kbuild test robot
2015-10-06 11:09     ` Suzuki K. Poulose
2015-10-08 11:08   ` Catalin Marinas
2015-10-13 10:12     ` Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 13/22] arm64: Make use of system wide capability checks Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 14/22] arm64: Cleanup HWCAP handling Suzuki K. Poulose
2015-10-08 11:10   ` Catalin Marinas
2015-10-08 11:17     ` Russell King - ARM Linux
2015-10-08 13:00       ` Catalin Marinas
2015-10-08 14:54         ` Edward Nevill
2015-10-05 17:02 ` [PATCH v2 15/22] arm64: Move FP/ASIMD hwcap handling to common code Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 16/22] arm64/debug: Make use of the system wide safe value Suzuki K. Poulose
2015-10-08 11:11   ` Catalin Marinas
2015-10-08 11:56     ` Suzuki K. Poulose
2015-10-08 15:08       ` Catalin Marinas
2015-10-08 15:57         ` Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 17/22] arm64/kvm: Make use of the system wide safe values Suzuki K. Poulose
2015-10-10 15:17   ` Christoffer Dall
2015-10-05 17:02 ` [PATCH v2 18/22] arm64: Add helper to decode register from instruction Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 19/22] arm64: cpufeature: Track the user visible fields Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 20/22] arm64: Expose feature registers by emulating MRS Suzuki K. Poulose
2015-10-05 17:02 ` [PATCH v2 21/22] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Suzuki K. Poulose
2015-10-06  9:09   ` Russell King - ARM Linux
2015-10-06 10:18     ` Steve Capper
2015-10-06 10:25       ` Mark Rutland
2015-10-06 10:29         ` Steve Capper
2015-10-06 19:16       ` Russell King - ARM Linux
2015-10-05 17:02 ` [PATCH v2 22/22] arm64: feature registers: Documentation Suzuki K. Poulose

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