linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Suzuki K. Poulose" <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, will.deacon@arm.com,
	mark.rutland@arm.com, dave.martin@arm.com,
	Vladimir.Murzin@arm.com, steve.capper@linaro.org,
	linux-kernel@vger.kernel.org, ard.biesheuvel@linaro.org,
	james.morse@arm.com, marc.zyngier@arm.com,
	christoffer.dall@linaro.org, andre.przywara@arm.com,
	edward.nevill@linaro.org, aph@redhat.com, ryan.arnold@linaro.org,
	"Suzuki K. Poulose" <suzuki.poulose@arm.com>
Subject: [PATCH v3 24/24] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs
Date: Tue, 13 Oct 2015 18:22:32 +0100	[thread overview]
Message-ID: <1444756952-31145-25-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1444756952-31145-1-git-send-email-suzuki.poulose@arm.com>

From: Steve Capper <steve.capper@linaro.org>

It can be useful for JIT software to be aware of MIDR_EL1 and
REVIDR_EL1 to ascertain the presence of any core errata that could
affect codegen.

This patch exposes these registers through sysfs:

/sys/devices/system/cpu/cpu$ID/identification/midr
/sys/devices/system/cpu/cpu$ID/identification/revidr

where $ID is the cpu number. For big.LITTLE systems, one can have a
mixture of cores (e.g. Cortex A53 and Cortex A57), thus all CPUs need
to be enumerated.

If the kernel does not have valid information to populate these entries
with, an empty string is returned to userspace.

Signed-off-by: Steve Capper <steve.capper@linaro.org>
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
---
Changes since V2:
  - Fix errno for failures (Spotted-by: Russell King)
  - Roll back, if we encounter a missing cpu device
  - Return error for access to registers of CPUs not present.
---
 arch/arm64/include/asm/cpu.h |    1 +
 arch/arm64/kernel/cpuinfo.c  |   69 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 70 insertions(+)

diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h
index b5e9cee..bb1b0cf 100644
--- a/arch/arm64/include/asm/cpu.h
+++ b/arch/arm64/include/asm/cpu.h
@@ -29,6 +29,7 @@ struct cpuinfo_arm64 {
 	u32		reg_cntfrq;
 	u32		reg_dczid;
 	u32		reg_midr;
+	u32		reg_revidr;
 
 	u64		reg_id_aa64dfr0;
 	u64		reg_id_aa64dfr1;
diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
index 52331ff..349ebf7 100644
--- a/arch/arm64/kernel/cpuinfo.c
+++ b/arch/arm64/kernel/cpuinfo.c
@@ -199,6 +199,7 @@ static void __cpuinfo_store_cpu(struct cpuinfo_arm64 *info)
 	info->reg_ctr = read_cpuid_cachetype();
 	info->reg_dczid = read_cpuid(DCZID_EL0);
 	info->reg_midr = read_cpuid_id();
+	info->reg_revidr = read_cpuid(REVIDR_EL1);
 
 	info->reg_id_aa64dfr0 = read_cpuid(ID_AA64DFR0_EL1);
 	info->reg_id_aa64dfr1 = read_cpuid(ID_AA64DFR1_EL1);
@@ -247,3 +248,71 @@ void __init cpuinfo_store_boot_cpu(void)
 	boot_cpu_data = *info;
 	init_cpu_features(&boot_cpu_data);
 }
+
+#define CPUINFO_ATTR_RO(_name)							\
+	static ssize_t show_##_name (struct device *dev,			\
+			struct device_attribute *attr, char *buf)		\
+	{									\
+		struct cpuinfo_arm64 *info = &per_cpu(cpu_data, dev->id);	\
+		if (!cpu_present(dev->id))					\
+			return -ENODEV;						\
+										\
+		if (info->reg_midr)						\
+			return sprintf(buf, "0x%016x\n", info->reg_##_name);	\
+		else								\
+			return 0;						\
+	}									\
+	static DEVICE_ATTR(_name, 0444, show_##_name, NULL)
+
+CPUINFO_ATTR_RO(midr);
+CPUINFO_ATTR_RO(revidr);
+
+static struct attribute *cpuregs_attrs[] = {
+	&dev_attr_midr.attr,
+	&dev_attr_revidr.attr,
+	NULL
+};
+
+static struct attribute_group cpuregs_attr_group = {
+	.attrs = cpuregs_attrs,
+	.name = "identification"
+};
+
+static int __init cpuinfo_regs_init(void)
+{
+	int cpu, finalcpu, ret;
+	struct device *dev;
+
+	for_each_present_cpu(cpu) {
+		dev = get_cpu_device(cpu);
+
+		if (!dev) {
+			ret = -ENODEV;
+			break;
+		}
+
+		ret = sysfs_create_group(&dev->kobj, &cpuregs_attr_group);
+		if (ret)
+			break;
+	}
+
+	if (!ret)
+		return 0;
+	/*
+	 * We were unable to put down sysfs groups for all the CPUs, revert
+	 * all the groups we have placed down s.t. none are visible.
+	 * Otherwise we could give a misleading picture of what's present.
+	 */
+	finalcpu = cpu;
+	for_each_present_cpu(cpu) {
+		if (cpu == finalcpu)
+			break;
+		dev = get_cpu_device(cpu);
+		if (dev)
+			sysfs_remove_group(&dev->kobj, &cpuregs_attr_group);
+	}
+
+	return ret;
+}
+
+device_initcall(cpuinfo_regs_init);
-- 
1.7.9.5


  parent reply	other threads:[~2015-10-13 17:24 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-13 17:22 [PATCH v3 00/24] arm64: Consolidate CPU feature handling Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 01/24] arm64: Make the CPU information more clear Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 02/24] arm64: Delay ELF HWCAP initialisation until all CPUs are up Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 03/24] arm64: Delay cpuinfo_store_boot_cpu Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 04/24] arm64: Move cpu feature detection code Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 05/24] arm64: Move mixed endian support detection Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 06/24] arm64: Move /proc/cpuinfo handling code Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 07/24] arm64: Define helper for sys_reg id manipulation Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 08/24] arm64: Handle width of a cpuid feature Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 09/24] arm64: Keep track of CPU feature registers Suzuki K. Poulose
2015-10-15 10:36   ` Catalin Marinas
2015-10-15 10:45     ` Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 10/24] arm64: Consolidate CPU Sanity check to CPU Feature infrastructure Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 11/24] arm64: Read system wide CPUID value Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 12/24] arm64: Cleanup mixed endian support detection Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 13/24] arm64: Populate cpuinfo after notify_cpu_starting Suzuki K. Poulose
2015-10-15 10:54   ` Catalin Marinas
2015-10-15 13:23     ` Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 14/24] arm64: Delay cpu feature capability checks Suzuki K. Poulose
2015-10-17 22:56   ` kbuild test robot
2015-10-19  9:41     ` Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 15/24] arm64: Make use of system wide " Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 16/24] arm64: Cleanup HWCAP handling Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 17/24] arm64: Move FP/ASIMD hwcap handling to common code Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 18/24] arm64/debug: Make use of the system wide safe value Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 19/24] arm64/kvm: Make use of the system wide safe values Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 20/24] arm64: Documentation - Expose CPU feature registers Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 21/24] arm64: Add helper to decode register from instruction Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 22/24] arm64: cpufeature: Track the user visible fields Suzuki K. Poulose
2015-10-13 17:22 ` [PATCH v3 23/24] arm64: Expose feature registers by emulating MRS Suzuki K. Poulose
2015-10-13 17:22 ` Suzuki K. Poulose [this message]
2015-10-14  9:03   ` [PATCH v3 24/24] arm64: cpuinfo: Expose MIDR_EL1 and REVIDR_EL1 to sysfs Suzuki K. Poulose
2015-10-16 15:13 ` [PATCH v3 00/24] arm64: Consolidate CPU feature handling Dave Martin
2015-10-16 15:32   ` Suzuki K. Poulose
2015-10-16 15:42     ` Dave Martin
2015-10-25  8:06 ` Siddhesh Poyarekar
2015-10-27 18:09   ` Suzuki K. Poulose
2015-10-28  8:53     ` Siddhesh Poyarekar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1444756952-31145-25-git-send-email-suzuki.poulose@arm.com \
    --to=suzuki.poulose@arm.com \
    --cc=Vladimir.Murzin@arm.com \
    --cc=andre.przywara@arm.com \
    --cc=aph@redhat.com \
    --cc=ard.biesheuvel@linaro.org \
    --cc=catalin.marinas@arm.com \
    --cc=christoffer.dall@linaro.org \
    --cc=dave.martin@arm.com \
    --cc=edward.nevill@linaro.org \
    --cc=james.morse@arm.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=marc.zyngier@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=ryan.arnold@linaro.org \
    --cc=steve.capper@linaro.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).