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From: Fabrice Gasnier <fabrice.gasnier@st.com>
To: <jic23@kernel.org>, <linux@armlinux.org.uk>, <robh+dt@kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: <linux-iio@vger.kernel.org>, <mark.rutland@arm.com>,
	<mcoquelin.stm32@gmail.com>, <alexandre.torgue@st.com>,
	<lars@metafoo.de>, <knaack.h@gmx.de>, <pmeerw@pmeerw.net>,
	<fabrice.gasnier@st.com>, <benjamin.gaignard@linaro.org>,
	<benjamin.gaignard@st.com>
Subject: [PATCH 3/7] iio: adc: stm32: add trigger polarity extended attribute
Date: Thu, 19 Jan 2017 14:34:10 +0100	[thread overview]
Message-ID: <1484832854-6314-4-git-send-email-fabrice.gasnier@st.com> (raw)
In-Reply-To: <1484832854-6314-1-git-send-email-fabrice.gasnier@st.com>

Define extended attribute so that user may choose rising, falling or both
edges for external trigger sources.
Default to rising edge in case it isn't set.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
 drivers/iio/adc/stm32-adc.c | 51 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 50 insertions(+), 1 deletion(-)

diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c
index 30708bc..9753c39 100644
--- a/drivers/iio/adc/stm32-adc.c
+++ b/drivers/iio/adc/stm32-adc.c
@@ -164,6 +164,7 @@ struct stm32_adc_trig_info {
  * @lock:		spinlock
  * @bufi:		data buffer index
  * @num_conv:		expected number of scan conversions
+ * @exten:		external trigger config (enable/polarity)
  */
 struct stm32_adc {
 	struct stm32_adc_common	*common;
@@ -175,6 +176,7 @@ struct stm32_adc {
 	spinlock_t		lock;		/* interrupt lock */
 	int			bufi;
 	int			num_conv;
+	enum stm32_adc_exten	exten;
 };
 
 /**
@@ -449,7 +451,9 @@ static int stm32_adc_set_trig(struct iio_dev *indio_dev,
 
 		/* set trigger source, default to rising edge */
 		extsel = ret;
-		exten = STM32_EXTEN_HWTRIG_RISING_EDGE;
+		if (adc->exten == STM32_EXTEN_SWTRIG)
+			adc->exten = STM32_EXTEN_HWTRIG_RISING_EDGE;
+		exten = adc->exten;
 	}
 
 	spin_lock_irqsave(&adc->lock, flags);
@@ -463,6 +467,39 @@ static int stm32_adc_set_trig(struct iio_dev *indio_dev,
 	return 0;
 }
 
+static int stm32_adc_set_trig_pol(struct iio_dev *indio_dev,
+				  const struct iio_chan_spec *chan,
+				  unsigned int type)
+{
+	struct stm32_adc *adc = iio_priv(indio_dev);
+
+	adc->exten = type;
+
+	return 0;
+}
+
+static int stm32_adc_get_trig_pol(struct iio_dev *indio_dev,
+				  const struct iio_chan_spec *chan)
+{
+	struct stm32_adc *adc = iio_priv(indio_dev);
+
+	return adc->exten;
+}
+
+static const char * const stm32_trig_pol_items[] = {
+	[STM32_EXTEN_SWTRIG] = "swtrig",
+	[STM32_EXTEN_HWTRIG_RISING_EDGE] = "rising-edge",
+	[STM32_EXTEN_HWTRIG_FALLING_EDGE] = "falling-edge",
+	[STM32_EXTEN_HWTRIG_BOTH_EDGES] = "both-edges",
+};
+
+const struct iio_enum stm32_adc_trig_pol = {
+	.items = stm32_trig_pol_items,
+	.num_items = ARRAY_SIZE(stm32_trig_pol_items),
+	.get = stm32_adc_get_trig_pol,
+	.set = stm32_adc_set_trig_pol,
+};
+
 /**
  * stm32_adc_single_conv() - Performs a single conversion
  * @indio_dev: IIO device
@@ -745,6 +782,17 @@ static irqreturn_t stm32_adc_trigger_handler(int irq, void *p)
 	return IRQ_HANDLED;
 }
 
+static const struct iio_chan_spec_ext_info stm32_adc_ext_info[] = {
+	IIO_ENUM("trigger_pol", IIO_SHARED_BY_ALL, &stm32_adc_trig_pol),
+	{
+		.name = "trigger_pol_available",
+		.shared = IIO_SHARED_BY_ALL,
+		.read = iio_enum_available_read,
+		.private = (uintptr_t)&stm32_adc_trig_pol,
+	},
+	{},
+};
+
 static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
 				    struct iio_chan_spec *chan,
 				    const struct stm32_adc_chan_spec *channel,
@@ -760,6 +808,7 @@ static void stm32_adc_chan_init_one(struct iio_dev *indio_dev,
 	chan->scan_type.sign = 'u';
 	chan->scan_type.realbits = 12;
 	chan->scan_type.storagebits = 16;
+	chan->ext_info = stm32_adc_ext_info;
 }
 
 static int stm32_adc_chan_of_init(struct iio_dev *indio_dev)
-- 
1.9.1

  parent reply	other threads:[~2017-01-19 13:35 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-19 13:34 [PATCH 0/7] Add support for triggered buffer mode to STM32 ADC Fabrice Gasnier
2017-01-19 13:34 ` [PATCH 1/7] iio: adc: stm32: add support for triggered buffer mode Fabrice Gasnier
2017-01-22 12:53   ` Jonathan Cameron
     [not found]     ` <2c683b78-6c78-3224-0646-37793deba0e9@st.com>
2017-01-28 14:02       ` Jonathan Cameron
2017-01-19 13:34 ` [PATCH 2/7] iio: adc: stm32: Enable use of stm32 timer triggers Fabrice Gasnier
2017-01-19 23:31   ` kbuild test robot
2017-01-21 12:55     ` Jonathan Cameron
2017-01-22 12:55   ` Jonathan Cameron
2017-01-24 14:37     ` Fabrice Gasnier
2017-01-28 12:46       ` Jonathan Cameron
2017-01-19 13:34 ` Fabrice Gasnier [this message]
2017-01-22 12:58   ` [PATCH 3/7] iio: adc: stm32: add trigger polarity extended attribute Jonathan Cameron
2017-01-24 14:41     ` Fabrice Gasnier
2017-01-19 13:34 ` [PATCH 4/7] Documentation: dt: iio: stm32-adc: optional dma support Fabrice Gasnier
2017-01-21 20:54   ` Rob Herring
2017-01-19 13:34 ` [PATCH 5/7] iio: adc: stm32: add " Fabrice Gasnier
2017-01-22 13:14   ` Jonathan Cameron
2017-01-24 14:43     ` Fabrice Gasnier
2017-01-24 18:25       ` Jonathan Cameron
2017-01-19 13:34 ` [PATCH 6/7] ARM: dts: stm32: Enable dma by default on stm32f4 adc Fabrice Gasnier
2017-01-19 13:34 ` [PATCH 7/7] ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-eval Fabrice Gasnier
2017-01-20  0:09   ` kbuild test robot
2017-01-20 10:19   ` Alexandre Torgue
2017-01-20 10:36     ` Fabrice Gasnier

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