From: matthew.gerlach@linux.intel.com
To: atull@kernel.org, moritz.fischer@ettus.com,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, agust@denx.de
Cc: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Subject: [PATCH v5 3/4] fpga dt: bindings for Altera Partial Reconfiguration IP.
Date: Fri, 10 Mar 2017 11:40:26 -0800 [thread overview]
Message-ID: <1489174827-6033-4-git-send-email-matthew.gerlach@linux.intel.com> (raw)
In-Reply-To: <1489174827-6033-1-git-send-email-matthew.gerlach@linux.intel.com>
From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Device Tree bindings for Altera Partial Reconfiguration IP.
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Acked-by: Rob Herring <robh@kernel.org>
---
v5:
fix comment as suggested by Rob Herring <robh@kernel.org>
added Acked-by: Rob Herring <robh@kernel.org>
v4: v3 patch set mistakenly sent out labeled as v4
v3: s/altr,pr-ip/altr,a10-pr-ip/
v2: s/Reconfiguraion/Reconfiguration/
---
Documentation/devicetree/bindings/fpga/altera-pr-ip.txt | 12 ++++++++++++
1 file changed, 12 insertions(+)
create mode 100644 Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
diff --git a/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
new file mode 100644
index 0000000..52a294c
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/altera-pr-ip.txt
@@ -0,0 +1,12 @@
+Altera Arria10 Partial Reconfiguration IP
+
+Required properties:
+- compatible : should contain "altr,a10-pr-ip"
+- reg : base address and size for memory mapped io.
+
+Example:
+
+ fpga_mgr: fpga-mgr@ff20c000 {
+ compatible = "altr,a10-pr-ip";
+ reg = <0xff20c000 0x10>;
+ };
--
2.7.4
next prev parent reply other threads:[~2017-03-10 19:41 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-10 19:40 [PATCH v5 0/4] Altera Partial Reconfiguration IP matthew.gerlach
2017-03-10 19:40 ` [PATCH v5 1/4] fpga: add config complete timeout matthew.gerlach
2017-03-13 20:46 ` Moritz Fischer
2017-03-10 19:40 ` [PATCH v5 2/4] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP matthew.gerlach
2017-03-13 20:49 ` Moritz Fischer
2017-03-18 18:53 ` Anatolij Gustschin
2017-03-20 23:49 ` matthew.gerlach
2017-03-21 21:04 ` Anatolij Gustschin
2017-03-22 16:08 ` matthew.gerlach
2017-03-22 16:39 ` Anatolij Gustschin
2017-03-10 19:40 ` matthew.gerlach [this message]
2017-03-13 20:47 ` [PATCH v5 3/4] fpga dt: bindings " Moritz Fischer
2017-03-10 19:40 ` [PATCH v5 4/4] fpga pr ip: Platform driver " matthew.gerlach
2017-03-13 20:48 ` Moritz Fischer
2017-03-18 18:27 ` Anatolij Gustschin
2017-03-20 23:42 ` matthew.gerlach
2017-03-13 20:46 ` [PATCH v5 0/4] " Moritz Fischer
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