[v2,1/2] ARM: dts: sun7i: Fix A20-OLinuXino-MICRO dts for LAN8710
diff mbox series

Message ID 1503901963-9457-2-git-send-email-stefan@olimex.com
State New, archived
Headers show
Series
  • Update board support for A20-OLinuXino-MICRO
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Commit Message

Stefan Mavrodiev Aug. 28, 2017, 6:32 a.m. UTC
>From revision J the board uses new phy chip LAN8710. Compared
with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
not to work. To fix this PA17 is muxed with GMAC function. This
makes the pin output-low.

This patch is compatible with earlier board revisions, since this
pin wasn't connected to phy.

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
---
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

Comments

Maxime Ripard Aug. 30, 2017, 2:37 p.m. UTC | #1
Hi,

On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
> From revision J the board uses new phy chip LAN8710. Compared
> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
> not to work. To fix this PA17 is muxed with GMAC function. This
> makes the pin output-low.
> 
> This patch is compatible with earlier board revisions, since this
> pin wasn't connected to phy.
> 
> Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
> ---
>  arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> index 0b7403e..cb1b081 100644
> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> @@ -102,7 +102,7 @@
>  
>  &gmac {
>  	pinctrl-names = "default";
> -	pinctrl-0 = <&gmac_pins_mii_a>;
> +	pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
>  	phy = <&phy1>;
>  	phy-mode = "mii";
>  	status = "okay";
> @@ -229,6 +229,11 @@
>  };
>  
>  &pio {
> +	gmac_txerr: gmac_txerr@0 {
> +		pins = "PA17";
> +		function = "gmac";
> +	};
> +

The patch looks fine, I still have one question though.

Can a PHY operate without this signal? My real question is, would it
make sense to mux that pin for all the users, or is it an optional
signal that each board designer can choose to use or not?

Thanks!
Maxime
Stefan Mavrodiev Aug. 31, 2017, 5:20 a.m. UTC | #2
On 08/30/2017 05:37 PM, Maxime Ripard wrote:
> Hi,
>
> On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
>>  From revision J the board uses new phy chip LAN8710. Compared
>> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
>> not to work. To fix this PA17 is muxed with GMAC function. This
>> makes the pin output-low.
>>
>> This patch is compatible with earlier board revisions, since this
>> pin wasn't connected to phy.
>>
>> Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
>> ---
>>   arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
>>   1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>> index 0b7403e..cb1b081 100644
>> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>> @@ -102,7 +102,7 @@
>>   
>>   &gmac {
>>   	pinctrl-names = "default";
>> -	pinctrl-0 = <&gmac_pins_mii_a>;
>> +	pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
>>   	phy = <&phy1>;
>>   	phy-mode = "mii";
>>   	status = "okay";
>> @@ -229,6 +229,11 @@
>>   };
>>   
>>   &pio {
>> +	gmac_txerr: gmac_txerr@0 {
>> +		pins = "PA17";
>> +		function = "gmac";
>> +	};
>> +
> The patch looks fine, I still have one question though.
>
> Can a PHY operate without this signal? My real question is, would it
> make sense to mux that pin for all the users, or is it an optional
> signal that each board designer can choose to use or not?
>
> Thanks!
> Maxime
>
This phy (LAN8710) cannot work without this pin. Part of the problem is in that we've replaced
without paying attention to this signal.

RTL8201 has no TXERR pin. The pin PA17 is used as reset signal and therefore is pulled up with
resistor. However on old revisions this option (there is jumper pad between SOC and PHY).

As I said, LAN8710 cannot work without this signal. In the datasheet is written:
	...
	The controller drives TXER high when a transmit error is detected.
	...

In the current variant of the dts, all data is threated as error.

So to answer you question. This is feature only on our board and highly depends on the chosen PHY.
I don't think this should be muxed for all users.



Best regards,
Stefan Mavrodiev,
Olimex Ltd.
Maxime Ripard Sept. 1, 2017, 1:06 p.m. UTC | #3
On Thu, Aug 31, 2017 at 08:20:18AM +0300, Stefan Mavrodiev wrote:
> > >  From revision J the board uses new phy chip LAN8710. Compared
> > > with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
> > > not to work. To fix this PA17 is muxed with GMAC function. This
> > > makes the pin output-low.
> > > 
> > > This patch is compatible with earlier board revisions, since this
> > > pin wasn't connected to phy.
> > > 
> > > Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
> > > ---
> > >   arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
> > >   1 file changed, 6 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > index 0b7403e..cb1b081 100644
> > > --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
> > > @@ -102,7 +102,7 @@
> > >   &gmac {
> > >   	pinctrl-names = "default";
> > > -	pinctrl-0 = <&gmac_pins_mii_a>;
> > > +	pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
> > >   	phy = <&phy1>;
> > >   	phy-mode = "mii";
> > >   	status = "okay";
> > > @@ -229,6 +229,11 @@
> > >   };
> > >   &pio {
> > > +	gmac_txerr: gmac_txerr@0 {
> > > +		pins = "PA17";
> > > +		function = "gmac";
> > > +	};
> > > +
> > The patch looks fine, I still have one question though.
> > 
> > Can a PHY operate without this signal? My real question is, would it
> > make sense to mux that pin for all the users, or is it an optional
> > signal that each board designer can choose to use or not?
> > 
> > Thanks!
> > Maxime
>
> This phy (LAN8710) cannot work without this pin. Part of the problem
> is in that we've replaced without paying attention to this signal.
> 
> RTL8201 has no TXERR pin. The pin PA17 is used as reset signal and
> therefore is pulled up with resistor. However on old revisions this
> option (there is jumper pad between SOC and PHY).
> 
> As I said, LAN8710 cannot work without this signal. In the datasheet
> is written:
>
> 	...
> 	The controller drives TXER high when a transmit error is detected.
> 	...
> 
> In the current variant of the dts, all data is threated as error.

Sorry if my question was unclear, I meant to ask for all PHYs
connected to an A20. I got that you were needing it for that
particular one :)

> So to answer you question. This is feature only on our board and
> highly depends on the chosen PHY.  I don't think this should be
> muxed for all users.

Ok, I guess it answers it. Thanks!
Maxime
Maxime Ripard Sept. 1, 2017, 1:08 p.m. UTC | #4
On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
> From revision J the board uses new phy chip LAN8710. Compared
> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
> not to work. To fix this PA17 is muxed with GMAC function. This
> makes the pin output-low.
> 
> This patch is compatible with earlier board revisions, since this
> pin wasn't connected to phy.
> 
> Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>

Applied for 4.15, thanks!
Maxime
Jonathan Liu Sept. 26, 2017, 1:09 p.m. UTC | #5
Hi Stefan,

On 31 August 2017 at 15:20, Stefan Mavrodiev <stefan.mavrodiev@gmail.com> wrote:
> On 08/30/2017 05:37 PM, Maxime Ripard wrote:
>>
>> Hi,
>>
>> On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
>>>
>>>  From revision J the board uses new phy chip LAN8710. Compared
>>> with RTL8201, RA17 pin is TXERR. It has pullup which causes phy
>>> not to work. To fix this PA17 is muxed with GMAC function. This
>>> makes the pin output-low.
>>>
>>> This patch is compatible with earlier board revisions, since this
>>> pin wasn't connected to phy.
>>>
>>> Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
>>> ---
>>>   arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 7 ++++++-
>>>   1 file changed, 6 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> index 0b7403e..cb1b081 100644
>>> --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
>>> @@ -102,7 +102,7 @@
>>>     &gmac {
>>>         pinctrl-names = "default";
>>> -       pinctrl-0 = <&gmac_pins_mii_a>;
>>> +       pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
>>>         phy = <&phy1>;
>>>         phy-mode = "mii";
>>>         status = "okay";
>>> @@ -229,6 +229,11 @@
>>>   };
>>>     &pio {
>>> +       gmac_txerr: gmac_txerr@0 {
>>> +               pins = "PA17";
>>> +               function = "gmac";
>>> +       };
>>> +
>>
>> The patch looks fine, I still have one question though.
>>
>> Can a PHY operate without this signal? My real question is, would it
>> make sense to mux that pin for all the users, or is it an optional
>> signal that each board designer can choose to use or not?
>>
>> Thanks!
>> Maxime
>>
> This phy (LAN8710) cannot work without this pin. Part of the problem is in
> that we've replaced
> without paying attention to this signal.
>
> RTL8201 has no TXERR pin. The pin PA17 is used as reset signal and therefore
> is pulled up with
> resistor. However on old revisions this option (there is jumper pad between
> SOC and PHY).
>
> As I said, LAN8710 cannot work without this signal. In the datasheet is
> written:
>         ...
>         The controller drives TXER high when a transmit error is detected.
>         ...
>
> In the current variant of the dts, all data is threated as error.
>
> So to answer you question. This is feature only on our board and highly
> depends on the chosen PHY.
> I don't think this should be muxed for all users.
>
>
>
> Best regards,
> Stefan Mavrodiev,
> Olimex Ltd.

Will you be submitting a patch for U-Boot as well?

Regards,
Jonathan

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index 0b7403e..cb1b081 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -102,7 +102,7 @@ 
 
 &gmac {
 	pinctrl-names = "default";
-	pinctrl-0 = <&gmac_pins_mii_a>;
+	pinctrl-0 = <&gmac_pins_mii_a>,<&gmac_txerr>;
 	phy = <&phy1>;
 	phy-mode = "mii";
 	status = "okay";
@@ -229,6 +229,11 @@ 
 };
 
 &pio {
+	gmac_txerr: gmac_txerr@0 {
+		pins = "PA17";
+		function = "gmac";
+	};
+
 	mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
 		pins = "PH11";
 		function = "gpio_in";