From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Linus Torvalds <torvalds@linux-foundation.org>,
Andy Lutomirsky <luto@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Dave Hansen <dave.hansen@intel.com>,
Borislav Petkov <bpetkov@suse.de>,
Greg KH <gregkh@linuxfoundation.org>,
keescook@google.com, hughd@google.com,
Brian Gerst <brgerst@gmail.com>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Denys Vlasenko <dvlasenk@redhat.com>,
Rik van Riel <riel@redhat.com>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Juergen Gross <jgross@suse.com>,
David Laight <David.Laight@aculab.com>,
Eduardo Valentin <eduval@amazon.com>,
aliguori@amazon.com, Will Deacon <will.deacon@arm.com>,
daniel.gruss@iaik.tugraz.at, Ingo Molnar <mingo@kernel.org>,
Borislav Petkov <bp@alien8.de>, Kees Cook <keescook@chromium.org>
Subject: [patch V149 02/50] x86/vsyscall/64: Explicitly set _PAGE_USER in the pagetable hierarchy
Date: Sat, 16 Dec 2017 22:23:56 +0100 [thread overview]
Message-ID: <20171216213136.580751518@linutronix.de> (raw)
In-Reply-To: 20171216212354.120930222@linutronix.de
[-- Attachment #1: 0075-x86-vsyscall-64-Explicitly-set-_PAGE_USER-in-the-pag.patch --]
[-- Type: text/plain, Size: 2747 bytes --]
From: Andy Lutomirski <luto@kernel.org>
The kernel is very erratic as to which pagetables have _PAGE_USER set. The
vsyscall page gets lucky: it seems that all of the relevant pagetables are
among the apparently arbitrary ones that set _PAGE_USER. Rather than
relying on chance, just explicitly set _PAGE_USER.
This will let us clean up pagetable setup to stop setting _PAGE_USER. The
added code can also be reused by pagetable isolation to manage the
_PAGE_USER bit in the usermode tables.
Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: David Laight <David.Laight@aculab.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/entry/vsyscall/vsyscall_64.c | 33 ++++++++++++++++++++++++++++++++-
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscall/vsyscall_64.c
index f279ba2643dc..bc88a0540347 100644
--- a/arch/x86/entry/vsyscall/vsyscall_64.c
+++ b/arch/x86/entry/vsyscall/vsyscall_64.c
@@ -329,16 +329,47 @@ int in_gate_area_no_mm(unsigned long addr)
return vsyscall_mode != NONE && (addr & PAGE_MASK) == VSYSCALL_ADDR;
}
+/*
+ * The VSYSCALL page is the only user-accessible page in the kernel address
+ * range. Normally, the kernel page tables can have _PAGE_USER clear, but
+ * the tables covering VSYSCALL_ADDR need _PAGE_USER set if vsyscalls
+ * are enabled.
+ *
+ * Some day we may create a "minimal" vsyscall mode in which we emulate
+ * vsyscalls but leave the page not present. If so, we skip calling
+ * this.
+ */
+static void __init set_vsyscall_pgtable_user_bits(void)
+{
+ pgd_t *pgd;
+ p4d_t *p4d;
+ pud_t *pud;
+ pmd_t *pmd;
+
+ pgd = pgd_offset_k(VSYSCALL_ADDR);
+ pgd->pgd |= _PAGE_USER;
+ p4d = p4d_offset(pgd, VSYSCALL_ADDR);
+#if CONFIG_PGTABLE_LEVELS >= 5
+ p4d->p4d |= _PAGE_USER;
+#endif
+ pud = pud_offset(p4d, VSYSCALL_ADDR);
+ pud->pud |= _PAGE_USER;
+ pmd = pmd_offset(pud, VSYSCALL_ADDR);
+ pmd->pmd |= _PAGE_USER;
+}
+
void __init map_vsyscall(void)
{
extern char __vsyscall_page;
unsigned long physaddr_vsyscall = __pa_symbol(&__vsyscall_page);
- if (vsyscall_mode != NONE)
+ if (vsyscall_mode != NONE) {
__set_fixmap(VSYSCALL_PAGE, physaddr_vsyscall,
vsyscall_mode == NATIVE
? PAGE_KERNEL_VSYSCALL
: PAGE_KERNEL_VVAR);
+ set_vsyscall_pgtable_user_bits();
+ }
BUILD_BUG_ON((unsigned long)__fix_to_virt(VSYSCALL_PAGE) !=
(unsigned long)VSYSCALL_ADDR);
--
2.14.1
next prev parent reply other threads:[~2017-12-16 21:47 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-16 21:23 [patch V149 00/50] x86/pti: Updated and reshuffled patch queue Thomas Gleixner
2017-12-16 21:23 ` [patch V149 01/50] x86/mm/dump_pagetables: Check PAGE_PRESENT for real Thomas Gleixner
2017-12-16 21:23 ` Thomas Gleixner [this message]
2017-12-16 21:23 ` [patch V149 03/50] x86/vsyscall/64: Warn and fail vsyscall emulation in NATIVE mode Thomas Gleixner
2017-12-16 21:23 ` [patch V149 04/50] arch: Allow arch_dup_mmap() to fail Thomas Gleixner
2017-12-16 21:23 ` [patch V149 05/50] x86/ldt: Rework locking Thomas Gleixner
2017-12-16 21:24 ` [patch V149 06/50] x86/ldt: Prevent ldt inheritance on exec Thomas Gleixner
2017-12-16 21:24 ` [patch V149 07/50] x86/mm/64: Improve the memory map documentation Thomas Gleixner
2017-12-16 21:24 ` [patch V149 08/50] x86/doc: Remove obvious weirdness Thomas Gleixner
2017-12-16 21:24 ` [patch V149 09/50] x86/entry: Remove SYSENTER_stack naming Thomas Gleixner
2017-12-16 21:24 ` [patch V149 10/50] x86/uv: Use the right tlbflush API Thomas Gleixner
2017-12-16 21:24 ` [patch V149 11/50] x86/microcode: Dont abuse the tlbflush interface Thomas Gleixner
2017-12-16 21:24 ` [patch V149 12/50] x86/mm: Use __flush_tlb_one() for kernel memory Thomas Gleixner
2017-12-16 21:24 ` [patch V149 13/50] x86/mm: Remove superfluous barriers Thomas Gleixner
2017-12-16 21:24 ` [patch V149 14/50] x86/mm: Clarify which functions are supposed to flush what Thomas Gleixner
2017-12-16 21:24 ` [patch V149 15/50] x86/mm: Move the CR3 construction functions to tlbflush.h Thomas Gleixner
2017-12-16 21:24 ` [patch V149 16/50] x86/mm: Remove hard-coded ASID limit checks Thomas Gleixner
2017-12-16 21:24 ` [patch V149 17/50] x86/mm: Put MMU to hardware ASID translation in one place Thomas Gleixner
2017-12-16 21:24 ` [patch V149 18/50] x86/mm: Create asm/invpcid.h Thomas Gleixner
2017-12-16 21:24 ` [patch V149 19/50] x86/cpufeatures: Add X86_BUG_CPU_INSECURE Thomas Gleixner
2017-12-16 21:24 ` [patch V149 20/50] x86/mm/pti: Disable global pages if PAGE_TABLE_ISOLATION=y Thomas Gleixner
2017-12-16 21:24 ` [patch V149 21/50] x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switching Thomas Gleixner
2017-12-16 21:24 ` [patch V149 22/50] x86/mm/pti: Add infrastructure for page table isolation Thomas Gleixner
2017-12-16 21:24 ` [patch V149 23/50] x86/mm/pti: Add mapping helper functions Thomas Gleixner
2017-12-16 21:24 ` [patch V149 24/50] x86/mm/pti: Allow NX poison to be set in p4d/pgd Thomas Gleixner
2017-12-16 21:24 ` [patch V149 25/50] x86/mm/pti: Allocate a separate user PGD Thomas Gleixner
2017-12-16 21:24 ` [patch V149 26/50] x86/mm/pti: Populate " Thomas Gleixner
2017-12-16 21:24 ` [patch V149 27/50] x86/mm/pti: Add functions to clone kernel PMDs Thomas Gleixner
2017-12-16 21:24 ` [patch V149 28/50] x86/mm/pti: Force entry through trampoline when PTI active Thomas Gleixner
2017-12-16 21:24 ` [patch V149 29/50] x86/fixmap: Move the CPU entry area into a separate PMD Thomas Gleixner
2017-12-16 21:24 ` [patch V149 30/50] x86/mm/pti: Share cpu_entry_area PMDs Thomas Gleixner
2017-12-16 21:24 ` [patch V149 31/50] x86/entry: Align entry text section to PMD boundary Thomas Gleixner
2017-12-16 21:24 ` [patch V149 32/50] x86/mm/pti: Share entry text PMD Thomas Gleixner
2017-12-16 21:24 ` [patch V149 33/50] x86/mm/pti: Map ESPFIX into user space Thomas Gleixner
2017-12-16 21:24 ` [patch V149 34/50] x86/fixmap: Move IDT fixmap into the cpu_entry_area range Thomas Gleixner
2017-12-16 21:24 ` [patch V149 35/50] x86/fixmap: Add debugstore entries to cpu_entry_area Thomas Gleixner
2017-12-16 21:24 ` [patch V149 36/50] x86/events/intel/ds: Map debug buffers in fixmap Thomas Gleixner
2017-12-16 21:24 ` [patch V149 37/50] x86/mm/64: Make a full PGD-entry size hole in the memory map Thomas Gleixner
2017-12-17 11:07 ` Kirill A. Shutemov
2017-12-16 21:24 ` [patch V149 38/50] x86/pti: Put the LDT in its own PGD if PTI is on Thomas Gleixner
2017-12-17 11:09 ` Kirill A. Shutemov
2017-12-16 21:24 ` [patch V149 39/50] x86/pti: Map the vsyscall page if needed Thomas Gleixner
2017-12-16 21:24 ` [patch V149 40/50] x86/mm: Allow flushing for future ASID switches Thomas Gleixner
2017-12-16 21:24 ` [patch V149 41/50] x86/mm: Abstract switching CR3 Thomas Gleixner
2017-12-16 21:24 ` [patch V149 42/50] x86/mm: Use/Fix PCID to optimize user/kernel switches Thomas Gleixner
2017-12-16 21:24 ` [patch V149 43/50] x86/mm: Optimize RESTORE_CR3 Thomas Gleixner
2017-12-16 21:24 ` [patch V149 44/50] x86/mm: Use INVPCID for __native_flush_tlb_single() Thomas Gleixner
2017-12-16 21:24 ` [patch V149 45/50] x86/mm: Clarify the whole ASID/kernel PCID/user PCID naming Thomas Gleixner
2017-12-16 21:24 ` [patch V149 46/50] x86/mm/pti: Add Kconfig Thomas Gleixner
2017-12-16 21:24 ` [patch V149 47/50] x86/mm/dump_pagetables: Add page table directory Thomas Gleixner
2017-12-16 21:24 ` [patch V149 48/50] x86/mm/dump_pagetables: Check user space page table for WX pages Thomas Gleixner
2017-12-16 21:24 ` [patch V149 49/50] x86/mm/dump_pagetables: Allow dumping current pagetables Thomas Gleixner
2017-12-16 21:24 ` [patch V149 50/50] x86/ldt: Make the LDT mapping RO Thomas Gleixner
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