From: Yixun Lan <yixun.lan@amlogic.com>
To: Kevin Hilman <khilman@baylibre.com>, <devicetree@vger.kernel.org>
Cc: Neil Armstrong <narmstrong@baylibre.com>,
Jerome Brunet <jbrunet@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Carlo Caione <carlo@caione.org>,
Yixun Lan <yixun.lan@amlogic.com>,
<linux-amlogic@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH 4/6] ARM64: dts: meson-axg: uart: Add the pinctrl info description
Date: Fri, 5 Jan 2018 17:56:19 +0800 [thread overview]
Message-ID: <20180105095621.196472-5-yixun.lan@amlogic.com> (raw)
In-Reply-To: <20180105095621.196472-1-yixun.lan@amlogic.com>
Describe the pinctrl info for the UART controller which found
in the Meson-AXG SoCs.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 96 ++++++++++++++++++++++++++++++
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index f6bf01cfff4b..78bb206e2897 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -303,6 +303,70 @@
function = "pwm_d";
};
};
+
+ uart_a_pins: uart_a {
+ mux {
+ groups = "uart_tx_a",
+ "uart_rx_a";
+ function = "uart_a";
+ };
+ };
+
+ uart_a_cts_rts_pins: uart_a_cts_rts {
+ mux {
+ groups = "uart_ctx_a",
+ "uart_rts_a";
+ function = "uart_a";
+ };
+ };
+
+ uart_b_x_pins: uart_b_x {
+ mux {
+ groups = "uart_tx_b_x",
+ "uart_rx_b_x";
+ function = "uart_b";
+ };
+ };
+
+ uart_b_x_cts_rts_pins: uart_b_x_cts_rts {
+ mux {
+ groups = "uart_cts_b_x",
+ "uart_rts_b_x";
+ function = "uart_b";
+ };
+ };
+
+ uart_b_z_pins: uart_b_z {
+ mux {
+ groups = "uart_tx_b_z",
+ "uart_rx_b_z";
+ function = "uart_b";
+ };
+ };
+
+ uart_b_z_cts_rts_pins: uart_b_z_cts_rts {
+ mux {
+ groups = "uart_cts_b_z",
+ "uart_rts_b_z";
+ function = "uart_b";
+ };
+ };
+
+ uart_ao_b_z_pins: uart_ao_b_z {
+ mux {
+ groups = "uart_ao_tx_b_z",
+ "uart_ao_rx_b_z";
+ function = "uart_ao_b_groupz";
+ };
+ };
+
+ uart_ao_b_z_cts_rts_pins: uart_ao_b_z_cts_rts {
+ mux {
+ groups = "uart_ao_cts_b_z",
+ "uart_ao_rts_b_z";
+ function = "uart_ao_b_groupz";
+ };
+ };
};
};
@@ -346,6 +410,38 @@
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aobus 0 0 15>;
};
+
+ uart_ao_a_pins: uart_ao_a {
+ mux {
+ groups = "uart_ao_tx_a",
+ "uart_ao_rx_a";
+ function = "uart_ao_a";
+ };
+ };
+
+ uart_ao_a_cts_rts_pins: uart_ao_a_cts_rts {
+ mux {
+ groups = "uart_ao_cts_a",
+ "uart_ao_rts_a";
+ function = "uart_ao_a";
+ };
+ };
+
+ uart_ao_b_pins: uart_ao_b {
+ mux {
+ groups = "uart_ao_tx_b",
+ "uart_ao_rx_b";
+ function = "uart_ao_b";
+ };
+ };
+
+ uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
+ mux {
+ groups = "uart_ao_cts_b",
+ "uart_ao_rts_b";
+ function = "uart_ao_b";
+ };
+ };
};
pwm_AO_ab: pwm@7000 {
--
2.15.1
next prev parent reply other threads:[~2018-01-05 9:56 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-05 9:56 [PATCH 0/6] ARM64: dts: meson-axg: UART DT updates Yixun Lan
2018-01-05 9:56 ` [PATCH 1/6] ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART Yixun Lan
2018-01-05 10:30 ` Jerome Brunet
2018-01-05 13:11 ` Yixun Lan
2018-01-05 9:56 ` [PATCH 2/6] ARM64: dts: meson-axg: uart: fix address space range Yixun Lan
2018-01-05 10:30 ` Jerome Brunet
2018-01-05 13:43 ` Yixun Lan
2018-01-05 9:56 ` [PATCH 3/6] ARM64: dts: meson-axg: uart: Add the clock info description Yixun Lan
2018-01-05 10:29 ` Jerome Brunet
2018-01-05 9:56 ` Yixun Lan [this message]
2018-01-05 10:28 ` [PATCH 4/6] ARM64: dts: meson-axg: uart: Add the pinctrl " Jerome Brunet
2018-01-05 14:22 ` Yixun Lan
2018-01-05 9:56 ` [PATCH 5/6] arm64: dts: meson-axg: complete the pinctrl info for UART_AO_A Yixun Lan
2018-01-05 10:27 ` Jerome Brunet
2018-01-05 9:56 ` [PATCH 6/6] ARM64: dts: meson-axg: enable the UART_A controller Yixun Lan
2018-01-05 10:27 ` Jerome Brunet
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