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From: Will Deacon <will.deacon@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, ard.biesheuvel@linaro.org,
	marc.zyngier@arm.com, lorenzo.pieralisi@arm.com,
	christoffer.dall@linaro.org, linux-kernel@vger.kernel.org,
	labbott@redhat.com, Will Deacon <will.deacon@arm.com>
Subject: [PATCH v2 04/11] arm64: cpufeature: Pass capability structure to ->enable callback
Date: Fri,  5 Jan 2018 13:12:34 +0000	[thread overview]
Message-ID: <1515157961-20963-5-git-send-email-will.deacon@arm.com> (raw)
In-Reply-To: <1515157961-20963-1-git-send-email-will.deacon@arm.com>

In order to invoke the CPU capability ->matches callback from the ->enable
callback for applying local-CPU workarounds, we need a handle on the
capability structure.

This patch passes a pointer to the capability structure to the ->enable
callback.

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/kernel/cpufeature.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index d723fc071f39..55712ab4e3bf 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1152,7 +1152,7 @@ void __init enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps)
 			 * uses an IPI, giving us a PSTATE that disappears when
 			 * we return.
 			 */
-			stop_machine(caps->enable, NULL, cpu_online_mask);
+			stop_machine(caps->enable, (void *)caps, cpu_online_mask);
 		}
 	}
 }
@@ -1195,7 +1195,7 @@ verify_local_cpu_features(const struct arm64_cpu_capabilities *caps)
 			cpu_die_early();
 		}
 		if (caps->enable)
-			caps->enable(NULL);
+			caps->enable((void *)caps);
 	}
 }
 
-- 
2.1.4

  parent reply	other threads:[~2018-01-05 13:14 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-05 13:12 [PATCH v2 00/11] arm64 kpti hardening and variant 2 workarounds Will Deacon
2018-01-05 13:12 ` [PATCH v2 01/11] arm64: use RET instruction for exiting the trampoline Will Deacon
2018-01-06 13:13   ` Ard Biesheuvel
2018-01-08 14:33     ` Will Deacon
2018-01-08 14:38       ` Ard Biesheuvel
2018-01-08 14:45         ` Will Deacon
2018-01-08 14:56           ` Ard Biesheuvel
2018-01-08 15:27         ` David Laight
2018-01-05 13:12 ` [PATCH v2 02/11] arm64: Kconfig: Reword UNMAP_KERNEL_AT_EL0 kconfig entry Will Deacon
2018-01-05 13:12 ` [PATCH v2 03/11] arm64: Take into account ID_AA64PFR0_EL1.CSV3 Will Deacon
2018-01-08  7:24   ` [v2,03/11] " Jayachandran C
2018-01-08  9:20     ` Marc Zyngier
2018-01-08 17:40       ` Jayachandran C
2018-01-08 17:51         ` Will Deacon
2018-01-08 18:22           ` Alan Cox
2018-01-09  4:06           ` Jayachandran C
2018-01-09 10:00             ` Will Deacon
2018-01-19  1:00               ` Jon Masters
2018-01-08 17:52         ` Marc Zyngier
2018-01-08 17:06     ` Will Deacon
2018-01-08 17:50       ` Jayachandran C
2018-01-05 13:12 ` Will Deacon [this message]
2018-01-05 13:12 ` [PATCH v2 05/11] drivers/firmware: Expose psci_get_version through psci_ops structure Will Deacon
2018-01-05 13:12 ` [PATCH v2 06/11] arm64: Move post_ttbr_update_workaround to C code Will Deacon
2018-01-05 13:12 ` [PATCH v2 07/11] arm64: Add skeleton to harden the branch predictor against aliasing attacks Will Deacon
2018-01-08  0:15   ` Jon Masters
2018-01-08 12:16   ` James Morse
2018-01-08 14:26     ` Will Deacon
2018-01-17  4:10   ` Yisheng Xie
2018-01-17 10:07     ` Will Deacon
2018-01-18  8:37       ` Yisheng Xie
2018-01-19  3:37       ` Li Kun
2018-01-19 14:28         ` Will Deacon
2018-01-22  6:52           ` Li Kun
2018-01-05 13:12 ` [PATCH v2 08/11] arm64: KVM: Use per-CPU vector when BP hardening is enabled Will Deacon
2018-01-05 13:12 ` [PATCH v2 09/11] arm64: KVM: Make PSCI_VERSION a fast path Will Deacon
2018-01-05 13:12 ` [PATCH v2 10/11] arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 Will Deacon
2018-01-05 13:12 ` [PATCH v2 11/11] arm64: Implement branch predictor hardening for affected Cortex-A CPUs Will Deacon
2018-01-05 14:46   ` James Morse
2018-01-05 14:57     ` Marc Zyngier
2018-01-08  6:31   ` [v2, " Jayachandran C
2018-01-08  6:53     ` [PATCH 1/2] arm64: cputype: Add MIDR values for Cavium ThunderX2 CPUs Jayachandran C
2018-01-08  6:53       ` [PATCH 2/2] arm64: Branch predictor hardening for Cavium ThunderX2 Jayachandran C
2018-01-08 16:46         ` Will Deacon
2018-01-08 17:19           ` Jayachandran C
2018-01-08 17:23             ` Will Deacon
2018-01-09  2:26               ` Jayachandran C
2018-01-09  9:53                 ` Will Deacon
2018-01-09 12:47           ` [PATCH v2] " Jayachandran C
2018-01-16 21:50             ` Jon Masters
2018-01-16 21:52             ` Jon Masters
2018-01-16 23:45               ` Jayachandran C
2018-01-17 18:34                 ` Jon Masters
2018-01-18 13:53                 ` Will Deacon
2018-01-18 17:56                   ` Jayachandran C
2018-01-18 18:27                     ` Jon Masters
2018-01-18 23:28                       ` Jayachandran C
2018-01-19  1:17                         ` Jon Masters
2018-01-19 12:22                   ` [PATCH v3 1/2] " Jayachandran C
2018-01-19 12:22                     ` [PATCH v3 2/2] arm64: Turn on KPTI only on CPUs that need it Jayachandran C
2018-01-22 11:41                       ` Will Deacon
2018-01-22 11:51                         ` Ard Biesheuvel
2018-01-22 11:55                           ` Will Deacon
2018-01-22 18:59                         ` Jon Masters
2018-01-19 19:08                     ` [PATCH v3 1/2] arm64: Branch predictor hardening for Cavium ThunderX2 Jon Masters
2018-01-22 11:33                     ` Will Deacon
2018-01-22 19:00                       ` Jon Masters
2018-01-23  9:51                         ` Will Deacon

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