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From: Tom Lendacky <thomas.lendacky@amd.com>
To: x86@kernel.org, linux-kernel@vger.kernel.org
Cc: Peter Zijlstra <peterz@infradead.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Dave Hansen <dave.hansen@intel.com>,
	Borislav Petkov <bp@alien8.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Tim Chen <tim.c.chen@linux.intel.com>,
	Greg Kroah-Hartman <gregkh@linux-foundation.org>,
	David Woodhouse <dwmw@amazon.co.uk>, Paul Turner <pjt@google.com>
Subject: [PATCH v1 3/3] x86/msr: Remove now unused definition of MFENCE_RDTSC feature
Date: Fri, 05 Jan 2018 10:08:05 -0600	[thread overview]
Message-ID: <20180105160805.23786.5177.stgit@tlendack-t1.amdoffice.net> (raw)
In-Reply-To: <20180105160736.23786.45026.stgit@tlendack-t1.amdoffice.net>

With the switch to using LFENCE_RDTSC on AMD platforms there is no longer
a need for the MFENCE_RDTSC feature.  Remove its usage and definition.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
---
 arch/x86/include/asm/cpufeatures.h |    2 +-
 arch/x86/include/asm/msr.h         |    3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 07cdd17..14ad778 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -96,7 +96,7 @@
 #define X86_FEATURE_SYSCALL32		( 3*32+14) /* "" syscall in IA32 userspace */
 #define X86_FEATURE_SYSENTER32		( 3*32+15) /* "" sysenter in IA32 userspace */
 #define X86_FEATURE_REP_GOOD		( 3*32+16) /* REP microcode works well */
-#define X86_FEATURE_MFENCE_RDTSC	( 3*32+17) /* "" MFENCE synchronizes RDTSC */
+/* free, was: #define X86_FEATURE_MFENCE_RDTSC	( 3*32+17)  "" MFENCE synchronizes RDTSC */
 #define X86_FEATURE_LFENCE_RDTSC	( 3*32+18) /* "" LFENCE synchronizes RDTSC */
 #define X86_FEATURE_ACC_POWER		( 3*32+19) /* AMD Accumulated Power Mechanism */
 #define X86_FEATURE_NOPL		( 3*32+20) /* The NOPL (0F 1F) instructions */
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 07962f5..8d8d7ae 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -214,8 +214,7 @@ static __always_inline unsigned long long rdtsc_ordered(void)
 	 * that some other imaginary CPU is updating continuously with a
 	 * time stamp.
 	 */
-	alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC,
-			  "lfence", X86_FEATURE_LFENCE_RDTSC);
+	alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC);
 	return rdtsc();
 }
 

  parent reply	other threads:[~2018-01-05 16:08 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-05 16:07 [PATCH v1 0/3] x86/cpu/AMD: Make LFENCE a serializing instruction on AMD Tom Lendacky
2018-01-05 16:07 ` [PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction Tom Lendacky
2018-01-05 16:35   ` Brian Gerst
2018-01-05 16:36     ` Tom Lendacky
2018-01-06 21:05   ` [tip:x86/pti] " tip-bot for Tom Lendacky
2018-01-05 16:07 ` [PATCH v1 2/3] x86/cpu/AMD: Use LFENCE_RDTSC instead of MFENCE_RDTSC Tom Lendacky
2018-01-06 21:06   ` [tip:x86/pti] " tip-bot for Tom Lendacky
2018-01-08 10:08     ` Thomas Gleixner
2018-01-08 10:23       ` Woodhouse, David
2018-01-08 10:25         ` Thomas Gleixner
2018-01-08 10:40       ` Andrew Cooper
2018-01-08 11:10         ` Thomas Gleixner
2018-01-08 14:47           ` Tom Lendacky
2018-01-08 14:54             ` Andrew Cooper
2018-01-08 16:48               ` Dr. David Alan Gilbert
2018-01-08 17:01                 ` Paolo Bonzini
2018-01-08 17:39                   ` Tom Lendacky
2018-01-08 17:42                     ` Paolo Bonzini
2018-01-17 17:21                   ` Tom Lendacky
2018-01-17 17:53                     ` Paolo Bonzini
2018-01-08 15:02             ` David Woodhouse
2018-01-08 15:15             ` Thomas Gleixner
2018-01-08 17:31               ` Tom Lendacky
2018-01-08 20:57                 ` Thomas Gleixner
2018-01-05 16:08 ` Tom Lendacky [this message]
2018-01-06 21:06   ` [tip:x86/pti] x86/msr: Remove now unused definition of MFENCE_RDTSC feature tip-bot for Tom Lendacky
2018-01-05 16:56 ` [PATCH v1 0/3] x86/cpu/AMD: Make LFENCE a serializing instruction on AMD Borislav Petkov

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