From: Paolo Bonzini <pbonzini@redhat.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: rkrcmar@redhat.com, liran.alon@oracle.com, jmattson@google.com,
aliguori@amazon.com, thomas.lendacky@amd.com, dwmw@amazon.co.uk,
bp@alien8.de, x86@kernel.org
Subject: [PATCH 3/8] kvm: vmx: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to the guest
Date: Tue, 9 Jan 2018 13:03:05 +0100 [thread overview]
Message-ID: <20180109120311.27565-4-pbonzini@redhat.com> (raw)
In-Reply-To: <20180109120311.27565-1-pbonzini@redhat.com>
Direct access to MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD is important
for performance. Allow load/store of MSR_IA32_SPEC_CTRL, restore guest
IBRS on VM entry and set it to 0 on VM exit (because Linux does not use
it yet).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
arch/x86/kvm/vmx.c | 42 ++++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 669f5f74857d..ef603692aa98 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -120,6 +120,8 @@
module_param_named(preemption_timer, enable_preemption_timer, bool, S_IRUGO);
#endif
+static bool __read_mostly have_spec_ctrl;
+
#define KVM_GUEST_CR0_MASK (X86_CR0_NW | X86_CR0_CD)
#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST (X86_CR0_WP | X86_CR0_NE)
#define KVM_VM_CR0_ALWAYS_ON \
@@ -609,6 +611,8 @@ struct vcpu_vmx {
u64 msr_host_kernel_gs_base;
u64 msr_guest_kernel_gs_base;
#endif
+ u64 spec_ctrl;
+
u32 vm_entry_controls_shadow;
u32 vm_exit_controls_shadow;
u32 secondary_exec_control;
@@ -3361,6 +3365,9 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_IA32_TSC:
msr_info->data = guest_read_tsc(vcpu);
break;
+ case MSR_IA32_SPEC_CTRL:
+ msr_info->data = to_vmx(vcpu)->spec_ctrl;
+ break;
case MSR_IA32_SYSENTER_CS:
msr_info->data = vmcs_read32(GUEST_SYSENTER_CS);
break;
@@ -3500,6 +3507,9 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_IA32_TSC:
kvm_write_tsc(vcpu, msr_info);
break;
+ case MSR_IA32_SPEC_CTRL:
+ to_vmx(vcpu)->spec_ctrl = data;
+ break;
case MSR_IA32_CR_PAT:
if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data))
@@ -7062,6 +7072,17 @@ static __init int hardware_setup(void)
goto out;
}
+ /*
+ * FIXME: this is only needed until SPEC_CTRL is supported
+ * by upstream Linux in cpufeatures, then it can be replaced
+ * with static_cpu_has.
+ */
+ have_spec_ctrl = cpu_has_spec_ctrl();
+ if (have_spec_ctrl)
+ pr_info("kvm: SPEC_CTRL available\n");
+ else
+ pr_info("kvm: SPEC_CTRL not available\n");
+
if (boot_cpu_has(X86_FEATURE_NX))
kvm_enable_efer_bits(EFER_NX);
@@ -7131,6 +7152,8 @@ static __init int hardware_setup(void)
vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false);
vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false);
vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false);
+ vmx_disable_intercept_for_msr(MSR_IA32_SPEC_CTRL, false);
+ vmx_disable_intercept_for_msr(MSR_IA32_PRED_CMD, false);
memcpy(vmx_msr_bitmap_legacy_x2apic_apicv,
vmx_msr_bitmap_legacy, PAGE_SIZE);
@@ -9601,6 +9624,13 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
vmx_arm_hv_timer(vcpu);
+ /*
+ * MSR_IA32_SPEC_CTRL is restored after the last indirect branch
+ * before vmentry.
+ */
+ if (have_spec_ctrl && vmx->spec_ctrl != 0)
+ wrmsrl(MSR_IA32_SPEC_CTRL, vmx->spec_ctrl);
+
vmx->__launched = vmx->loaded_vmcs->launched;
asm(
/* Store host registers */
@@ -9707,6 +9737,18 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
#endif
);
+ if (have_spec_ctrl) {
+ rdmsrl(MSR_IA32_SPEC_CTRL, vmx->spec_ctrl);
+ if (vmx->spec_ctrl != 0)
+ wrmsrl(MSR_IA32_SPEC_CTRL, 0);
+ }
+ /*
+ * Speculative execution past the above wrmsrl might encounter
+ * an indirect branch and use guest-controlled contents of the
+ * indirect branch predictor; block it.
+ */
+ asm("lfence");
+
/* MSR_IA32_DEBUGCTLMSR is zeroed on vmexit. Restore it if needed */
if (vmx->host_debugctlmsr)
update_debugctlmsr(vmx->host_debugctlmsr);
--
1.8.3.1
next prev parent reply other threads:[~2018-01-09 12:05 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-09 12:03 [PATCH v2 0/8] KVM: x86: expose CVE-2017-5715 ("Spectre variant 2") mitigations to guest Paolo Bonzini
2018-01-09 12:03 ` [PATCH 1/8] KVM: x86: add SPEC_CTRL and IBPB_SUPPORT accessors Paolo Bonzini
2018-01-15 9:42 ` David Hildenbrand
2018-01-09 12:03 ` [PATCH 2/8] x86/msr: add definitions for indirect branch predictor MSRs Paolo Bonzini
2018-01-09 12:03 ` Paolo Bonzini [this message]
2018-01-13 10:16 ` [PATCH 3/8] kvm: vmx: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to the guest Longpeng (Mike)
2018-01-15 9:23 ` Paolo Bonzini
2018-01-15 9:34 ` Thomas Gleixner
2018-01-09 12:03 ` [PATCH 4/8] kvm: vmx: Set IBPB when running a different VCPU Paolo Bonzini
2018-01-12 1:49 ` Wanpeng Li
2018-01-12 17:03 ` Jim Mattson
2018-01-13 9:29 ` Woodhouse, David
2018-01-15 9:21 ` Paolo Bonzini
2018-01-09 12:03 ` [PATCH 5/8] KVM: SVM: fix comment Paolo Bonzini
2018-01-15 9:53 ` David Hildenbrand
2018-01-09 12:03 ` [PATCH 6/8] kvm: svm: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to guest Paolo Bonzini
2018-01-09 14:22 ` Konrad Rzeszutek Wilk
2018-01-09 16:05 ` Paolo Bonzini
2018-01-09 16:08 ` Paolo Bonzini
2018-01-11 10:45 ` Wanpeng Li
2018-01-10 20:13 ` Tom Lendacky
2018-01-11 10:33 ` Paolo Bonzini
2018-01-09 12:03 ` [PATCH 7/8] x86/svm: Set IBPB when running a different VCPU Paolo Bonzini
2018-01-09 14:23 ` Konrad Rzeszutek Wilk
2018-01-09 12:03 ` [PATCH 8/8] KVM: x86: add SPEC_CTRL and IBPB_SUPPORT to MSR and CPUID lists Paolo Bonzini
2018-01-13 1:25 ` Eric Wheeler
2018-01-13 8:00 ` Paolo Bonzini
2018-01-16 0:40 ` Eric Wheeler
2018-01-16 7:39 ` R: " Paolo Bonzini
2018-01-09 12:03 ` [PATCH 9/8] KVM: x86: limit MSR_IA32_SPEC_CTRL access based on CPUID availability Paolo Bonzini
2018-01-16 0:55 ` Eric Wheeler
2018-01-16 12:59 ` Paolo Bonzini
2018-01-30 13:21 ` [9/8] " Mihai Carabas
2018-01-30 16:33 ` Jim Mattson
2018-01-30 16:43 ` Mihai Carabas
2018-01-30 16:57 ` Jim Mattson
2018-01-30 17:14 ` David Woodhouse
2018-01-30 17:38 ` Jim Mattson
2018-01-30 17:45 ` Thomas Gleixner
2018-01-30 23:11 ` Paolo Bonzini
2018-01-30 23:47 ` David Woodhouse
2018-01-31 1:06 ` Paolo Bonzini
2018-02-05 11:10 ` Ingo Molnar
2018-02-05 11:15 ` David Woodhouse
2018-02-05 12:10 ` Ingo Molnar
2018-01-09 16:06 [PATCH 3/8] kvm: vmx: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to the guest Liran Alon
2018-01-09 16:48 Liran Alon
2018-01-09 16:57 ` Paolo Bonzini
2018-01-10 5:03 ` Nadav Amit
2018-01-10 13:20 ` Paolo Bonzini
2018-01-10 14:06 ` Arjan van de Ven
2018-01-10 14:28 ` Paolo Bonzini
2018-01-10 15:41 ` Konrad Rzeszutek Wilk
2018-01-10 15:45 ` Paolo Bonzini
2018-01-10 15:48 ` Woodhouse, David
2018-01-10 15:56 ` Paolo Bonzini
2018-01-10 16:05 ` David Woodhouse
2018-01-12 23:17 ` Jim Mattson
2018-01-12 23:19 ` Nadav Amit
2018-01-10 0:33 Liran Alon
2018-01-10 16:19 Liran Alon
2018-01-10 16:27 ` Paolo Bonzini
2018-01-10 17:14 ` Jim Mattson
2018-01-10 17:16 ` Paolo Bonzini
2018-01-10 17:23 ` Nadav Amit
2018-01-10 17:32 ` Jim Mattson
2018-01-10 16:47 ` David Woodhouse
2018-01-10 16:51 Liran Alon
2018-01-10 17:07 ` David Woodhouse
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180109120311.27565-4-pbonzini@redhat.com \
--to=pbonzini@redhat.com \
--cc=aliguori@amazon.com \
--cc=bp@alien8.de \
--cc=dwmw@amazon.co.uk \
--cc=jmattson@google.com \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=liran.alon@oracle.com \
--cc=rkrcmar@redhat.com \
--cc=thomas.lendacky@amd.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).