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From: "Christian König" <ckoenig.leichtzumerken@gmail.com>
To: bhelgaas@google.com
Cc: linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] x86/PCI: add kernel option and taint it when we add a 64bit window
Date: Wed, 10 Jan 2018 13:25:50 +0100	[thread overview]
Message-ID: <20180110122551.1637-1-christian.koenig@amd.com> (raw)

Only try to enable a 64bit window on AMD CPUs when pci=big_root_window is
specified and taint the kernel when we add the window.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 arch/x86/include/asm/pci_x86.h | 1 +
 arch/x86/pci/common.c          | 5 +++++
 arch/x86/pci/fixup.c           | 4 ++++
 3 files changed, 10 insertions(+)

diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index 7a5d6695abd3..eb66fa9cd0fc 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -38,6 +38,7 @@ do {						\
 #define PCI_NOASSIGN_ROMS	0x80000
 #define PCI_ROOT_NO_CRS		0x100000
 #define PCI_NOASSIGN_BARS	0x200000
+#define PCI_BIG_ROOT_WINDOW	0x400000
 
 extern unsigned int pci_probe;
 extern unsigned long pirq_table_addr;
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 7a5350d08cef..563049c483a1 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -594,6 +594,11 @@ char *__init pcibios_setup(char *str)
 	} else if (!strcmp(str, "nocrs")) {
 		pci_probe |= PCI_ROOT_NO_CRS;
 		return NULL;
+#ifdef CONFIG_PHYS_ADDR_T_64BIT
+	} else if (!strcmp(str, "big_root_window")) {
+		pci_probe |= PCI_BIG_ROOT_WINDOW;
+		return NULL;
+#endif
 	} else if (!strcmp(str, "earlydump")) {
 		pci_early_dump_regs = 1;
 		return NULL;
diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c
index e663d6bf1328..a91280da2ea1 100644
--- a/arch/x86/pci/fixup.c
+++ b/arch/x86/pci/fixup.c
@@ -667,6 +667,9 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
 	struct resource *res, *conflict;
 	struct pci_dev *other;
 
+	if (!(pci_probe & PCI_BIG_ROOT_WINDOW))
+		return;
+
 	/* Check that we are the only device of that type */
 	other = pci_get_device(dev->vendor, dev->device, NULL);
 	if (other != dev ||
@@ -715,6 +718,7 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev)
 	}
 
 	dev_info(&dev->dev, "adding root bus resource %pR\n", res);
+	add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
 
 	base = ((res->start >> 8) & AMD_141b_MMIO_BASE_MMIOBASE_MASK) |
 		AMD_141b_MMIO_BASE_RE_MASK | AMD_141b_MMIO_BASE_WE_MASK;
-- 
2.11.0

             reply	other threads:[~2018-01-10 12:25 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-10 12:25 Christian König [this message]
2018-01-10 12:25 ` [PATCH 2/2] x86/PCI: limit the size of the 64bit window to 256GB v2 Christian König
2018-01-10 18:02   ` Bjorn Helgaas
2018-01-10 18:14     ` Christian König
2018-01-10 20:37       ` Bjorn Helgaas
2018-01-10 20:10 ` [PATCH 1/2] x86/PCI: add kernel option and taint it when we add a 64bit window Randy Dunlap

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