From: Greentime Hu <green.hu@gmail.com>
To: greentime@andestech.com, linux-kernel@vger.kernel.org,
arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de,
jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org,
netdev@vger.kernel.org, deanbo422@gmail.com,
devicetree@vger.kernel.org, viro@zeniv.linux.org.uk,
dhowells@redhat.com, will.deacon@arm.com,
daniel.lezcano@linaro.org, linux-serial@vger.kernel.org,
geert.uytterhoeven@gmail.com, linus.walleij@linaro.org,
mark.rutland@arm.com, greg@kroah.com, ren_guo@c-sky.com,
rdunlap@infradead.org, davem@davemloft.net, jonas@southpole.se,
stefan.kristiansson@saunalahti.fi, shorne@gmail.com
Cc: green.hu@gmail.com, Rick Chen <rick@andestech.com>
Subject: [PATCH v6 35/36] irqchip: Andestech Internal Vector Interrupt Controller driver
Date: Mon, 15 Jan 2018 13:53:43 +0800 [thread overview]
Message-ID: <1d5ae41a94d63b2be5184c51cf5fe9743916061e.1515766253.git.green.hu@gmail.com> (raw)
In-Reply-To: <cover.1515766253.git.green.hu@gmail.com>
In-Reply-To: <cover.1515766253.git.green.hu@gmail.com>
From: Greentime Hu <greentime@andestech.com>
This patch adds the Andestech Internal Vector Interrupt Controller
driver. You can find the spec here. Ch4.9 of AndeStar SPA V3 Manual.
http://www.andestech.com/product.php?cls=9
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ativic32.c | 107 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 108 insertions(+)
create mode 100644 drivers/irqchip/irq-ativic32.c
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile
index b842dfd..201ca9f 100644
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -80,3 +80,4 @@ obj-$(CONFIG_ARCH_ASPEED) += irq-aspeed-vic.o irq-aspeed-i2c-ic.o
obj-$(CONFIG_STM32_EXTI) += irq-stm32-exti.o
obj-$(CONFIG_QCOM_IRQ_COMBINER) += qcom-irq-combiner.o
obj-$(CONFIG_IRQ_UNIPHIER_AIDET) += irq-uniphier-aidet.o
+obj-$(CONFIG_NDS32) += irq-ativic32.o
diff --git a/drivers/irqchip/irq-ativic32.c b/drivers/irqchip/irq-ativic32.c
new file mode 100644
index 0000000..f69a858
--- /dev/null
+++ b/drivers/irqchip/irq-ativic32.c
@@ -0,0 +1,107 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (C) 2005-2017 Andes Technology Corporation
+
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/interrupt.h>
+#include <linux/irqdomain.h>
+#include <linux/irqchip.h>
+#include <nds32_intrinsic.h>
+
+static void ativic32_ack_irq(struct irq_data *data)
+{
+ __nds32__mtsr_dsb(BIT(data->hwirq), NDS32_SR_INT_PEND2);
+}
+
+static void ativic32_mask_irq(struct irq_data *data)
+{
+ unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
+ __nds32__mtsr_dsb(int_mask2 & (~(BIT(data->hwirq))), NDS32_SR_INT_MASK2);
+}
+
+static void ativic32_unmask_irq(struct irq_data *data)
+{
+ unsigned long int_mask2 = __nds32__mfsr(NDS32_SR_INT_MASK2);
+ __nds32__mtsr_dsb(int_mask2 | (BIT(data->hwirq)), NDS32_SR_INT_MASK2);
+}
+
+static struct irq_chip ativic32_chip = {
+ .name = "ativic32",
+ .irq_ack = ativic32_ack_irq,
+ .irq_mask = ativic32_mask_irq,
+ .irq_unmask = ativic32_unmask_irq,
+};
+
+static unsigned int __initdata nivic_map[6] = { 6, 2, 10, 16, 24, 32 };
+
+static struct irq_domain *root_domain;
+static int ativic32_irq_domain_map(struct irq_domain *id, unsigned int virq,
+ irq_hw_number_t hw)
+{
+
+ unsigned long int_trigger_type;
+ u32 type;
+ struct irq_data *irq_data;
+ int_trigger_type = __nds32__mfsr(NDS32_SR_INT_TRIGGER);
+ irq_data = irq_get_irq_data(virq);
+ if (!irq_data)
+ return -EINVAL;
+
+ if (int_trigger_type & (BIT(hw))) {
+ irq_set_chip_and_handler(virq, &ativic32_chip, handle_edge_irq);
+ type = IRQ_TYPE_EDGE_RISING;
+ } else {
+ irq_set_chip_and_handler(virq, &ativic32_chip, handle_level_irq);
+ type = IRQ_TYPE_LEVEL_HIGH;
+ }
+
+ irqd_set_trigger_type(irq_data, type);
+ return 0;
+}
+
+static struct irq_domain_ops ativic32_ops = {
+ .map = ativic32_irq_domain_map,
+ .xlate = irq_domain_xlate_onecell
+};
+
+static irq_hw_number_t get_intr_src(void)
+{
+ return ((__nds32__mfsr(NDS32_SR_ITYPE) & ITYPE_mskVECTOR) >> ITYPE_offVECTOR)
+ - NDS32_VECTOR_offINTERRUPT;
+}
+
+asmlinkage void asm_do_IRQ(struct pt_regs *regs)
+{
+ irq_hw_number_t hwirq = get_intr_src();
+ handle_domain_irq(root_domain, hwirq, regs);
+}
+
+int __init ativic32_init_irq(struct device_node *node, struct device_node *parent)
+{
+ unsigned long int_vec_base, nivic, nr_ints;
+
+ if (WARN(parent, "non-root ativic32 are not supported"))
+ return -EINVAL;
+
+ int_vec_base = __nds32__mfsr(NDS32_SR_IVB);
+
+ if (((int_vec_base & IVB_mskIVIC_VER) >> IVB_offIVIC_VER) == 0)
+ panic("Unable to use atcivic32 for this cpu.\n");
+
+ nivic = (int_vec_base & IVB_mskNIVIC) >> IVB_offNIVIC;
+ if (nivic >= ARRAY_SIZE(nivic_map))
+ panic("The number of input for ativic32 is not supported.\n");
+
+ nr_ints = nivic_map[nivic];
+
+ root_domain = irq_domain_add_linear(node, nr_ints,
+ &ativic32_ops, NULL);
+
+ if (!root_domain)
+ panic("%s: unable to create IRQ domain\n", node->full_name);
+
+ return 0;
+}
+IRQCHIP_DECLARE(ativic32, "andestech,ativic32", ativic32_init_irq);
--
1.7.9.5
next prev parent reply other threads:[~2018-01-15 5:56 UTC|newest]
Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-15 5:53 [PATCH v6 00/36] Andes(nds32) Linux Kernel Port Greentime Hu
2018-01-15 5:53 ` [PATCH v6 01/36] asm-generic/io.h: move ioremap_nocache/ioremap_uc/ioremap_wc/ioremap_wt out of ifndef CONFIG_MMU Greentime Hu
2018-01-15 5:53 ` [PATCH v6 02/36] openrisc: add ioremap_nocache declaration before include asm-generic/io.h and sync ioremap prototype with it Greentime Hu
2018-01-15 13:07 ` Stafford Horne
2018-01-15 13:28 ` Greentime Hu
2018-01-15 5:53 ` [PATCH v6 03/36] sparc: io: To use the define of ioremap_[nocache|wc|wb] in asm-generic/io.h Greentime Hu
2018-01-18 9:56 ` Arnd Bergmann
2018-01-19 12:50 ` Greentime Hu
2018-01-15 5:53 ` [PATCH v6 04/36] earlycon: add reg-offset to physical address before mapping Greentime Hu
2018-01-18 10:00 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 05/36] nds32: Assembly macros and definitions Greentime Hu
2018-01-18 10:01 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 06/36] nds32: Kernel booting and initialization Greentime Hu
2018-01-18 10:11 ` Arnd Bergmann
2018-01-19 16:34 ` Greentime Hu
2018-01-19 16:41 ` Arnd Bergmann
2018-01-22 9:49 ` Greentime Hu
2018-01-22 9:53 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 07/36] nds32: Exception handling Greentime Hu
2018-01-18 10:14 ` Arnd Bergmann
2018-01-24 10:53 ` Vincent Chen
2018-01-24 11:09 ` Arnd Bergmann
2018-01-24 11:10 ` Arnd Bergmann
2018-01-30 10:01 ` Vincent Chen
2018-01-30 13:33 ` Arnd Bergmann
2018-01-30 14:49 ` Greentime Hu
2018-01-30 15:27 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 08/36] nds32: MMU definitions Greentime Hu
2018-01-18 10:14 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 09/36] nds32: MMU initialization Greentime Hu
2018-01-18 10:16 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 10/36] nds32: MMU fault handling and page table management Greentime Hu
2018-01-18 10:16 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 11/36] nds32: Cache and TLB routines Greentime Hu
2018-01-18 10:17 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 12/36] nds32: Process management Greentime Hu
2018-01-18 10:22 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 13/36] nds32: IRQ handling Greentime Hu
2018-01-18 10:22 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 14/36] nds32: Atomic operations Greentime Hu
2018-01-18 10:23 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 15/36] nds32: Device specific operations Greentime Hu
2018-01-18 10:25 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 16/36] nds32: DMA mapping API Greentime Hu
2018-01-18 10:26 ` Arnd Bergmann
2018-01-23 8:23 ` Greentime Hu
2018-01-23 11:52 ` Greentime Hu
2018-01-24 11:36 ` Arnd Bergmann
2018-01-25 3:45 ` Greentime Hu
2018-01-25 10:42 ` Arnd Bergmann
2018-01-25 13:48 ` Greentime Hu
2018-01-15 5:53 ` [PATCH v6 17/36] nds32: ELF definitions Greentime Hu
2018-01-18 10:27 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 18/36] nds32: System calls handling Greentime Hu
2018-01-18 10:27 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 19/36] nds32: VDSO support Greentime Hu
2018-01-18 10:28 ` Arnd Bergmann
2018-02-06 7:41 ` Vincent Chen
2018-02-06 8:48 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 20/36] nds32: Signal handling support Greentime Hu
2018-01-18 10:30 ` Arnd Bergmann
2018-01-24 0:56 ` Vincent Chen
2018-01-24 11:13 ` Arnd Bergmann
2018-02-06 6:39 ` Vincent Chen
2018-01-15 5:53 ` [PATCH v6 21/36] nds32: Library functions Greentime Hu
2018-01-18 10:31 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 22/36] nds32: Debugging support Greentime Hu
2018-01-18 10:37 ` Arnd Bergmann
2018-01-23 7:28 ` Vincent Chen
2018-01-23 8:21 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 23/36] nds32: L2 cache support Greentime Hu
2018-01-18 10:37 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 24/36] nds32: Loadable modules Greentime Hu
2018-01-18 10:41 ` Arnd Bergmann
2018-01-19 14:26 ` Greentime Hu
2018-01-15 5:53 ` [PATCH v6 25/36] nds32: Generic timers support Greentime Hu
2018-01-18 10:41 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 26/36] nds32: Device tree support Greentime Hu
2018-01-18 10:43 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 27/36] nds32: Miscellaneous header files Greentime Hu
2018-01-18 10:46 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 28/36] nds32: defconfig Greentime Hu
2018-01-18 10:44 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 29/36] nds32: Build infrastructure Greentime Hu
2018-01-18 11:00 ` Arnd Bergmann
2018-01-22 15:20 ` Greentime Hu
2018-01-22 15:38 ` Arnd Bergmann
2018-01-22 16:00 ` Greentime Hu
2018-01-15 5:53 ` [PATCH v6 30/36] MAINTAINERS: Add nds32 Greentime Hu
2018-01-18 10:45 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 31/36] dt-bindings: nds32 CPU Bindings Greentime Hu
2018-01-18 11:02 ` Arnd Bergmann
2018-01-19 14:32 ` Greentime Hu
2018-01-19 14:52 ` Arnd Bergmann
2018-01-19 15:18 ` Greentime Hu
2018-01-19 15:29 ` Geert Uytterhoeven
2018-01-19 15:35 ` Greentime Hu
2018-01-19 15:37 ` Geert Uytterhoeven
2018-01-22 9:53 ` Greentime Hu
2018-01-22 11:15 ` Arnd Bergmann
2018-01-22 13:55 ` Greentime Hu
2018-01-15 5:53 ` [PATCH v6 32/36] dt-bindings: nds32 L2 cache controller Bindings Greentime Hu
2018-01-18 10:45 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 33/36] dt-bindings: nds32 SoC Bindings Greentime Hu
2018-01-18 11:03 ` Arnd Bergmann
2018-01-15 5:53 ` [PATCH v6 34/36] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller Greentime Hu
2018-01-18 10:46 ` Arnd Bergmann
2018-01-15 5:53 ` Greentime Hu [this message]
2018-01-15 5:53 ` [PATCH v6 36/36] net: faraday add nds32 support Greentime Hu
2018-01-18 11:02 ` Arnd Bergmann
2018-01-18 9:49 ` [PATCH v6 00/36] Andes(nds32) Linux Kernel Port Arnd Bergmann
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