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From: David Woodhouse <dwmw@amazon.co.uk>
To: arjan@linux.intel.com, tglx@linutronix.de, karahmed@amazon.de,
	x86@kernel.org, linux-kernel@vger.kernel.org,
	tim.c.chen@linux.intel.com, bp@alien8.de, peterz@infradead.org,
	pbonzini@redhat.com, ak@linux.intel.com,
	torvalds@linux-foundation.org, gregkh@linux-foundation.org
Subject: [PATCH v2 3/8] x86/msr: Add definitions for new speculation control MSRs
Date: Sun, 21 Jan 2018 09:49:04 +0000	[thread overview]
Message-ID: <1516528149-9370-4-git-send-email-dwmw@amazon.co.uk> (raw)
In-Reply-To: <1516528149-9370-1-git-send-email-dwmw@amazon.co.uk>

Add MSR and bit definitions for SPEC_CTRL, PRED_CMD and ARCH_CAPABILITIES.

See Intel's 336996-Speculative-Execution-Side-Channel-Mitigations.pdf

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
---
 arch/x86/include/asm/msr-index.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index fa11fb1..3e50463 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -42,6 +42,13 @@
 #define MSR_PPIN_CTL			0x0000004e
 #define MSR_PPIN			0x0000004f
 
+#define MSR_IA32_SPEC_CTRL		0x00000048 /* Speculation Control */
+#define SPEC_CTRL_IBRS			(1 << 0)   /* Indirect Branch Restricted Speculation */
+#define SPEC_CTRL_STIBP			(1 << 1)   /* Single Thread Indirect Branch Predictors */
+
+#define MSR_IA32_PRED_CMD		0x00000049 /* Prediction Command */
+#define PRED_CMD_IBPB			(1 << 0)   /* Indirect Branch Prediction Barrier */
+
 #define MSR_IA32_PERFCTR0		0x000000c1
 #define MSR_IA32_PERFCTR1		0x000000c2
 #define MSR_FSB_FREQ			0x000000cd
@@ -60,6 +67,10 @@
 #define MSR_IA32_BBL_CR_CTL		0x00000119
 #define MSR_IA32_BBL_CR_CTL3		0x0000011e
 
+#define MSR_IA32_ARCH_CAPABILITIES	0x0000010a
+#define ARCH_CAP_RDCL_NO		(1 << 0)   /* Not susceptible to Meltdown */
+#define ARCH_CAP_IBRS_ALL		(1 << 1)   /* Enhanced IBRS support */
+
 #define MSR_IA32_SYSENTER_CS		0x00000174
 #define MSR_IA32_SYSENTER_ESP		0x00000175
 #define MSR_IA32_SYSENTER_EIP		0x00000176
-- 
2.7.4

  parent reply	other threads:[~2018-01-21  9:49 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-21  9:49 [PATCH v2 0/8] Speculation Control feature support, IBPB David Woodhouse
2018-01-21  9:49 ` [PATCH v2 1/8] x86/cpufeatures: Add Intel feature bits for Speculation Control David Woodhouse
2018-01-21 10:17   ` Ingo Molnar
2018-01-21  9:49 ` [PATCH v2 2/8] x86/cpufeatures: Add AMD feature bits for Prediction Command David Woodhouse
2018-01-21 17:50   ` Tom Lendacky
2018-01-21 18:01     ` Andrew Cooper
2018-01-22 14:31       ` Tom Lendacky
2018-01-22 14:33         ` Andrew Cooper
2018-01-21  9:49 ` David Woodhouse [this message]
2018-01-21 13:06   ` [PATCH v2 3/8] x86/msr: Add definitions for new speculation control MSRs Jiri Slaby
2018-01-21 13:27     ` David Woodhouse
2018-01-21  9:49 ` [PATCH v2 4/8] x86/pti: Do not enable PTI on fixed Intel processors David Woodhouse
2018-01-21 13:38   ` Borislav Petkov
2018-01-21  9:49 ` [PATCH v2 5/8] x86/speculation: Add basic support for IBPB David Woodhouse
2018-01-21 10:26   ` Ingo Molnar
2018-01-21 18:06   ` Borislav Petkov
2018-01-21 18:29     ` KarimAllah Ahmed
2018-01-21 19:01       ` Borislav Petkov
2018-01-21 19:31         ` David Woodhouse
2018-01-21 19:37           ` Andrew Cooper
2018-01-21 20:04             ` David Woodhouse
2018-01-21 20:19               ` Andrew Cooper
2018-01-21 21:25                 ` David Woodhouse
2018-01-21 19:53           ` Borislav Petkov
2018-01-21 18:54     ` David Woodhouse
2018-01-21 19:04       ` Borislav Petkov
2018-01-21 19:31         ` David Woodhouse
2018-01-21 19:54           ` Borislav Petkov
2018-01-21 20:07             ` David Woodhouse
2018-01-21 20:17               ` Borislav Petkov
2018-01-21  9:49 ` [PATCH v2 6/8] x86/kvm: Add IBPB support David Woodhouse
2018-01-21 18:06   ` Tom Lendacky
2018-01-21  9:49 ` [PATCH v2 7/8] x86/speculation: Use Indirect Branch Prediction Barrier in context switch David Woodhouse
2018-01-21  9:49 ` [PATCH v2 8/8] x86/mm: Only flush indirect branches when switching into non dumpable process David Woodhouse
2018-01-21 10:33   ` Ingo Molnar

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