From: Fabrice Gasnier <fabrice.gasnier@st.com>
To: <thierry.reding@gmail.com>, <robh+dt@kernel.org>,
<alexandre.torgue@st.com>
Cc: <mark.rutland@arm.com>, <linux@armlinux.org.uk>,
<mcoquelin.stm32@gmail.com>, <fabrice.gasnier@st.com>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-pwm@vger.kernel.org>
Subject: [PATCH 2/3] pwm: stm32: LPTimer: use 3 cells xlate
Date: Thu, 1 Feb 2018 14:44:37 +0100 [thread overview]
Message-ID: <1517492678-767-3-git-send-email-fabrice.gasnier@st.com> (raw)
In-Reply-To: <1517492678-767-1-git-send-email-fabrice.gasnier@st.com>
From: Gerald Baeza <gerald.baeza@st.com>
STM32 Low-Power Timer supports generic 3 cells pwm to encode
PWM number, period and polarity.
Signed-off-by: Gerald Baeza <gerald.baeza@st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
---
drivers/pwm/pwm-stm32-lp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index 1ac9e43..346b7bd 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -203,6 +203,8 @@ static int stm32_pwm_lp_probe(struct platform_device *pdev)
priv->chip.dev = &pdev->dev;
priv->chip.ops = &stm32_pwm_lp_ops;
priv->chip.npwm = 1;
+ priv->chip.of_xlate = of_pwm_xlate_with_flags;
+ priv->chip.of_pwm_n_cells = 3;
ret = pwmchip_add(&priv->chip);
if (ret < 0)
--
1.9.1
next prev parent reply other threads:[~2018-02-01 13:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-01 13:44 [PATCH 0/3] Add pwm-cells on STM32 LPTimer Fabrice Gasnier
2018-02-01 13:44 ` [PATCH 1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells Fabrice Gasnier
2018-02-05 6:09 ` Rob Herring
2018-02-01 13:44 ` Fabrice Gasnier [this message]
2018-02-01 13:44 ` [PATCH 3/3] ARM: dts: stm32: update pwm-cells for LPTimer on stm32h743 Fabrice Gasnier
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