[PATCH v2 08/27] x86/CPU: Adapt assembly for PIE support

From: Thomas Garnier <thgarnie@google.com>
To: "Herbert Xu" <herbert@gondor.apana.org.au>,
	"David S . Miller" <davem@davemloft.net>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"H . Peter Anvin" <hpa@zytor.com>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Josh Poimboeuf" <jpoimboe@redhat.com>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Kate Stewart" <kstewart@linuxfoundation.org>,
	"Thomas Garnier" <thgarnie@google.com>,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Philippe Ombredanne" <pombredanne@nexb.com>,
	"Arnaldo Carvalho de Melo" <acme@redhat.com>,
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	"Christopher Li" <sparse@chrisli.org>,
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	"Dou Liyang" <douly.fnst@cn.fujitsu.com>,
	"Lukas Wunner" <lukas@wunner.de>,
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	"Masahiro Yamada" <yamada.masahiro@socionext.com>,
	"Ingo Molnar" <mingo@kernel.org>,
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	"H . J . Lu" <hjl.tools@gmail.com>,
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	"Joerg Roedel" <joro@8bytes.org>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
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	"Jonathan Corbet" <corbet@lwn.net>,
	"Matthew Wilcox" <mawilcox@microsoft.com>,
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	"Baoquan He" <bhe@redhat.com>,
	"Daniel Micay" <danielmicay@gmail.com>,
	"Jan H . Schönherr" <jschoenh@amazon.de>
Cc: x86@kernel.org, linux-crypto@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	virtualization@lists.linux-foundation.org,
	xen-devel@lists.xenproject.org, linux-arch@vger.kernel.org,
	linux-sparse@vger.kernel.org, kvm@vger.kernel.org,
	linux-doc@vger.kernel.org, kernel-hardening@lists.openwall.com
Subject: [PATCH v2 08/27] x86/CPU: Adapt assembly for PIE support
Date: Tue, 13 Mar 2018 13:59:26 -0700	[thread overview]
Message-ID: <20180313205945.245105-9-thgarnie@google.com> (raw)
In-Reply-To: <20180313205945.245105-1-thgarnie@google.com>

Change the assembly code to use only relative references of symbols for the
kernel to be PIE compatible. Use the new _ASM_MOVABS macro instead of
the 'mov $symbol, %dst' construct.

Position Independent Executable (PIE) support will allow to extended the
KASLR randomization range below the -2G memory limit.

Signed-off-by: Thomas Garnier <thgarnie@google.com>
---
 arch/x86/include/asm/processor.h | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index b0ccd4847a58..1b9488b1018a 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -50,7 +50,7 @@ static inline void *current_text_addr(void)
 {
 	void *pc;
 
-	asm volatile("mov $1f, %0; 1:":"=r" (pc));
+	asm volatile(_ASM_MOVABS " $1f, %0; 1:":"=r" (pc));
 
 	return pc;
 }
@@ -710,6 +710,7 @@ static inline void sync_core(void)
 		: ASM_CALL_CONSTRAINT : : "memory");
 #else
 	unsigned int tmp;
+	unsigned long tmp2;
 
 	asm volatile (
 		UNWIND_HINT_SAVE
@@ -720,11 +721,13 @@ static inline void sync_core(void)
 		"pushfq\n\t"
 		"mov %%cs, %0\n\t"
 		"pushq %q0\n\t"
-		"pushq $1f\n\t"
+		"leaq 1f(%%rip), %1\n\t"
+		"pushq %1\n\t"
 		"iretq\n\t"
 		UNWIND_HINT_RESTORE
 		"1:"
-		: "=&r" (tmp), ASM_CALL_CONSTRAINT : : "cc", "memory");
+		: "=&r" (tmp), "=&r" (tmp2), ASM_CALL_CONSTRAINT
+		: : "cc", "memory");
 #endif
 }
 
-- 
2.16.2.660.g709887971b-goog
