From: Stu Hsieh <stu.hsieh@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Philipp Zabel <p.zabel@pengutronix.de>
Cc: David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>, Stu Hsieh <stu.hsieh@mediatek.com>
Subject: [PATCH v7 29/29] drm/mediatek: Add support for mediatek SOC MT2712
Date: Wed, 20 Jun 2018 16:19:31 +0800 [thread overview]
Message-ID: <1529482771-2153-30-git-send-email-stu.hsieh@mediatek.com> (raw)
In-Reply-To: <1529482771-2153-1-git-send-email-stu.hsieh@mediatek.com>
This patch add support for the Mediatek MT2712 DISP subsystem.
There are two OVL engine and three disp output in MT2712.
Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 39 ++++++++++++++++++++++++++++++++++
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 38 +++++++++++++++++++++++++++++++++
2 files changed, 77 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 15e436d4e8a0..87e4191c250e 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -65,6 +65,24 @@
#define MT8173_MUTEX_MOD_DISP_PWM1 24
#define MT8173_MUTEX_MOD_DISP_OD 25
+#define MT2712_MUTEX_MOD_DISP_PWM2 10
+#define MT2712_MUTEX_MOD_DISP_OVL0 11
+#define MT2712_MUTEX_MOD_DISP_OVL1 12
+#define MT2712_MUTEX_MOD_DISP_RDMA0 13
+#define MT2712_MUTEX_MOD_DISP_RDMA1 14
+#define MT2712_MUTEX_MOD_DISP_RDMA2 15
+#define MT2712_MUTEX_MOD_DISP_WDMA0 16
+#define MT2712_MUTEX_MOD_DISP_WDMA1 17
+#define MT2712_MUTEX_MOD_DISP_COLOR0 18
+#define MT2712_MUTEX_MOD_DISP_COLOR1 19
+#define MT2712_MUTEX_MOD_DISP_AAL0 20
+#define MT2712_MUTEX_MOD_DISP_UFOE 22
+#define MT2712_MUTEX_MOD_DISP_PWM0 23
+#define MT2712_MUTEX_MOD_DISP_PWM1 24
+#define MT2712_MUTEX_MOD_DISP_OD0 25
+#define MT2712_MUTEX_MOD2_DISP_AAL1 33
+#define MT2712_MUTEX_MOD2_DISP_OD1 34
+
#define MT2701_MUTEX_MOD_DISP_OVL 3
#define MT2701_MUTEX_MOD_DISP_WDMA 6
#define MT2701_MUTEX_MOD_DISP_COLOR 7
@@ -138,6 +156,26 @@ static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] = {
[DDP_COMPONENT_WDMA0] = MT2701_MUTEX_MOD_DISP_WDMA,
};
+static const unsigned int mt2712_mutex_mod[DDP_COMPONENT_ID_MAX] = {
+ [DDP_COMPONENT_AAL0] = MT2712_MUTEX_MOD_DISP_AAL0,
+ [DDP_COMPONENT_AAL1] = MT2712_MUTEX_MOD2_DISP_AAL1,
+ [DDP_COMPONENT_COLOR0] = MT2712_MUTEX_MOD_DISP_COLOR0,
+ [DDP_COMPONENT_COLOR1] = MT2712_MUTEX_MOD_DISP_COLOR1,
+ [DDP_COMPONENT_OD0] = MT2712_MUTEX_MOD_DISP_OD0,
+ [DDP_COMPONENT_OD1] = MT2712_MUTEX_MOD2_DISP_OD1,
+ [DDP_COMPONENT_OVL0] = MT2712_MUTEX_MOD_DISP_OVL0,
+ [DDP_COMPONENT_OVL1] = MT2712_MUTEX_MOD_DISP_OVL1,
+ [DDP_COMPONENT_PWM0] = MT2712_MUTEX_MOD_DISP_PWM0,
+ [DDP_COMPONENT_PWM1] = MT2712_MUTEX_MOD_DISP_PWM1,
+ [DDP_COMPONENT_PWM2] = MT2712_MUTEX_MOD_DISP_PWM2,
+ [DDP_COMPONENT_RDMA0] = MT2712_MUTEX_MOD_DISP_RDMA0,
+ [DDP_COMPONENT_RDMA1] = MT2712_MUTEX_MOD_DISP_RDMA1,
+ [DDP_COMPONENT_RDMA2] = MT2712_MUTEX_MOD_DISP_RDMA2,
+ [DDP_COMPONENT_UFOE] = MT2712_MUTEX_MOD_DISP_UFOE,
+ [DDP_COMPONENT_WDMA0] = MT2712_MUTEX_MOD_DISP_WDMA0,
+ [DDP_COMPONENT_WDMA1] = MT2712_MUTEX_MOD_DISP_WDMA1,
+};
+
static const unsigned int mt8173_mutex_mod[DDP_COMPONENT_ID_MAX] = {
[DDP_COMPONENT_AAL0] = MT8173_MUTEX_MOD_DISP_AAL,
[DDP_COMPONENT_COLOR0] = MT8173_MUTEX_MOD_DISP_COLOR0,
@@ -533,6 +571,7 @@ static int mtk_ddp_remove(struct platform_device *pdev)
static const struct of_device_id ddp_driver_dt_match[] = {
{ .compatible = "mediatek,mt2701-disp-mutex", .data = mt2701_mutex_mod},
+ { .compatible = "mediatek,mt2712-disp-mutex", .data = mt2712_mutex_mod},
{ .compatible = "mediatek,mt8173-disp-mutex", .data = mt8173_mutex_mod},
{},
};
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
index 3d279a299383..71a4b1c85cd2 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
@@ -146,6 +146,32 @@ static const enum mtk_ddp_comp_id mt2701_mtk_ddp_ext[] = {
DDP_COMPONENT_DPI0,
};
+static const enum mtk_ddp_comp_id mt2712_mtk_ddp_main[] = {
+ DDP_COMPONENT_OVL0,
+ DDP_COMPONENT_COLOR0,
+ DDP_COMPONENT_AAL0,
+ DDP_COMPONENT_OD0,
+ DDP_COMPONENT_RDMA0,
+ DDP_COMPONENT_DPI0,
+ DDP_COMPONENT_PWM0,
+};
+
+static const enum mtk_ddp_comp_id mt2712_mtk_ddp_ext[] = {
+ DDP_COMPONENT_OVL1,
+ DDP_COMPONENT_COLOR1,
+ DDP_COMPONENT_AAL1,
+ DDP_COMPONENT_OD1,
+ DDP_COMPONENT_RDMA1,
+ DDP_COMPONENT_DPI1,
+ DDP_COMPONENT_PWM1,
+};
+
+static const enum mtk_ddp_comp_id mt2712_mtk_ddp_third[] = {
+ DDP_COMPONENT_RDMA2,
+ DDP_COMPONENT_DSI3,
+ DDP_COMPONENT_PWM2,
+};
+
static const enum mtk_ddp_comp_id mt8173_mtk_ddp_main[] = {
DDP_COMPONENT_OVL0,
DDP_COMPONENT_COLOR0,
@@ -173,6 +199,15 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
.shadow_register = true,
};
+static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
+ .main_path = mt2712_mtk_ddp_main,
+ .main_len = ARRAY_SIZE(mt2712_mtk_ddp_main),
+ .ext_path = mt2712_mtk_ddp_ext,
+ .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext),
+ .third_path = mt2712_mtk_ddp_third,
+ .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third),
+};
+
static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
.main_path = mt8173_mtk_ddp_main,
.main_len = ARRAY_SIZE(mt8173_mtk_ddp_main),
@@ -379,6 +414,7 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
{ .compatible = "mediatek,mt8173-dsi", .data = (void *)MTK_DSI },
{ .compatible = "mediatek,mt8173-dpi", .data = (void *)MTK_DPI },
{ .compatible = "mediatek,mt2701-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
+ { .compatible = "mediatek,mt2712-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt8173-disp-mutex", .data = (void *)MTK_DISP_MUTEX },
{ .compatible = "mediatek,mt2701-disp-pwm", .data = (void *)MTK_DISP_BLS },
{ .compatible = "mediatek,mt8173-disp-pwm", .data = (void *)MTK_DISP_PWM },
@@ -557,6 +593,8 @@ static SIMPLE_DEV_PM_OPS(mtk_drm_pm_ops, mtk_drm_sys_suspend,
static const struct of_device_id mtk_drm_of_ids[] = {
{ .compatible = "mediatek,mt2701-mmsys",
.data = &mt2701_mmsys_driver_data},
+ { .compatible = "mediatek,mt2712-mmsys",
+ .data = &mt2712_mmsys_driver_data},
{ .compatible = "mediatek,mt8173-mmsys",
.data = &mt8173_mmsys_driver_data},
{ }
--
2.12.5
next prev parent reply other threads:[~2018-06-20 9:25 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-20 8:19 [PATCH v7 00/29] Add support for mediatek SOC MT2712 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 01/29] drm/mediatek: update dt-bindings for mt2712 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 02/29] drm/mediatek: support maximum 64 mutex mod Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 03/29] drm/mediatek: add ddp component AAL1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 04/29] drm/mediatek: add ddp component OD1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 05/29] drm/mediatek: add ddp component PWM1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 06/29] drm/mediatek: add ddp component PWM2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 07/29] drm/mediatek: add component DPI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 08/29] drm/mediatek: add component DSI2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 09/29] drm/mediatek: add component DSI3 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 10/29] drm/mediatek: add the DSI1 for component init condition Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 11/29] drm/mediatek: add connection from OD1 to RDMA1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 12/29] drm/mediatek: Update the definition of connection from RDMA1 to DPI0 Stu Hsieh
2018-06-20 8:33 ` CK Hu
2018-06-20 8:19 ` [PATCH v7 13/29] drm/mediatek: add connection from RDMA0 " Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 14/29] drm/mediatek: add connection from RDMA0 to DSI2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 15/29] drm/mediatek: add connection from RDMA0 to DSI3 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 16/29] drm/mediatek: add connection from RDMA1 to DPI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 17/29] drm/mediatek: add connection from RDMA1 to DSI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 18/29] drm/mediatek: add connection from RDMA1 to DSI2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 19/29] drm/mediatek: add connection from RDMA1 to DSI3 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 20/29] drm/mediatek: add connection from RDMA2 to DPI0 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 21/29] drm/mediatek: add connection from RDMA2 to DPI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 22/29] drm/mediatek: add connection from RDMA2 to DSI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 23/29] drm/mediatek: add connection from RDMA2 to DSI2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 24/29] drm/mediatek: add connection from RDMA2 to DSI3 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 25/29] drm/mediatek: add DPI1 support for mutex Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 26/29] drm/mediatek: add DSI2 " Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 27/29] drm/mediatek: add DSI3 " Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 28/29] drm/mediatek: add third ddp path Stu Hsieh
2018-06-20 8:19 ` Stu Hsieh [this message]
2018-06-25 8:47 ` [PATCH v7 00/29] Add support for mediatek SOC MT2712 Daniel Vetter
2018-06-28 3:45 ` Stu Hsieh
2018-06-28 6:02 ` Daniel Vetter
2018-07-02 1:39 ` CK Hu
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