From: Stu Hsieh <stu.hsieh@mediatek.com>
To: CK Hu <ck.hu@mediatek.com>, Philipp Zabel <p.zabel@pengutronix.de>
Cc: David Airlie <airlied@linux.ie>, Rob Herring <robh+dt@kernel.org>,
"Mark Rutland" <mark.rutland@arm.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
<dri-devel@lists.freedesktop.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<srv_heupstream@mediatek.com>,
"Stu Hsieh" <stu.hsieh@mediatek.com>
Subject: [PATCH v7 19/29] drm/mediatek: add connection from RDMA1 to DSI3
Date: Wed, 20 Jun 2018 16:19:21 +0800 [thread overview]
Message-ID: <1529482771-2153-20-git-send-email-stu.hsieh@mediatek.com> (raw)
In-Reply-To: <1529482771-2153-1-git-send-email-stu.hsieh@mediatek.com>
This patch add the connection from RDMA1 to DSI3
Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 9cf2fcb4932a..d0d5f337ce14 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -90,10 +90,12 @@
#define RDMA1_SOUT_DPI1 0x3
#define RDMA1_SOUT_DSI1 0x1
#define RDMA1_SOUT_DSI2 0x4
+#define RDMA1_SOUT_DSI3 0x5
#define DPI0_SEL_IN_RDMA1 0x1
#define DPI1_SEL_IN_RDMA1 (0x1 << 8)
#define DSI1_SEL_IN_RDMA1 0x1
#define DSI2_SEL_IN_RDMA1 (0x1 << 16)
+#define DSI3_SEL_IN_RDMA1 (0x1 << 16)
#define COLOR1_SEL_IN_OVL1 0x1
#define OVL_MOUT_EN_RDMA 0x1
@@ -182,6 +184,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI2) {
*addr = DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN;
value = RDMA1_SOUT_DSI2;
+ } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI3) {
+ *addr = DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN;
+ value = RDMA1_SOUT_DSI3;
} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DPI0) {
*addr = DISP_REG_CONFIG_DISP_RDMA1_SOUT_EN;
value = RDMA1_SOUT_DPI0;
@@ -216,6 +221,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI2) {
*addr = DISP_REG_CONFIG_DSIE_SEL_IN;
value = DSI2_SEL_IN_RDMA1;
+ } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI3) {
+ *addr = DISP_REG_CONFIG_DSIO_SEL_IN;
+ value = DSI3_SEL_IN_RDMA1;
} else if (cur == DDP_COMPONENT_OVL1 && next == DDP_COMPONENT_COLOR1) {
*addr = DISP_REG_CONFIG_DISP_COLOR1_SEL_IN;
value = COLOR1_SEL_IN_OVL1;
--
2.12.5
next prev parent reply other threads:[~2018-06-20 9:23 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-20 8:19 [PATCH v7 00/29] Add support for mediatek SOC MT2712 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 01/29] drm/mediatek: update dt-bindings for mt2712 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 02/29] drm/mediatek: support maximum 64 mutex mod Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 03/29] drm/mediatek: add ddp component AAL1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 04/29] drm/mediatek: add ddp component OD1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 05/29] drm/mediatek: add ddp component PWM1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 06/29] drm/mediatek: add ddp component PWM2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 07/29] drm/mediatek: add component DPI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 08/29] drm/mediatek: add component DSI2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 09/29] drm/mediatek: add component DSI3 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 10/29] drm/mediatek: add the DSI1 for component init condition Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 11/29] drm/mediatek: add connection from OD1 to RDMA1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 12/29] drm/mediatek: Update the definition of connection from RDMA1 to DPI0 Stu Hsieh
2018-06-20 8:33 ` CK Hu
2018-06-20 8:19 ` [PATCH v7 13/29] drm/mediatek: add connection from RDMA0 " Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 14/29] drm/mediatek: add connection from RDMA0 to DSI2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 15/29] drm/mediatek: add connection from RDMA0 to DSI3 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 16/29] drm/mediatek: add connection from RDMA1 to DPI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 17/29] drm/mediatek: add connection from RDMA1 to DSI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 18/29] drm/mediatek: add connection from RDMA1 to DSI2 Stu Hsieh
2018-06-20 8:19 ` Stu Hsieh [this message]
2018-06-20 8:19 ` [PATCH v7 20/29] drm/mediatek: add connection from RDMA2 to DPI0 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 21/29] drm/mediatek: add connection from RDMA2 to DPI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 22/29] drm/mediatek: add connection from RDMA2 to DSI1 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 23/29] drm/mediatek: add connection from RDMA2 to DSI2 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 24/29] drm/mediatek: add connection from RDMA2 to DSI3 Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 25/29] drm/mediatek: add DPI1 support for mutex Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 26/29] drm/mediatek: add DSI2 " Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 27/29] drm/mediatek: add DSI3 " Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 28/29] drm/mediatek: add third ddp path Stu Hsieh
2018-06-20 8:19 ` [PATCH v7 29/29] drm/mediatek: Add support for mediatek SOC MT2712 Stu Hsieh
2018-06-25 8:47 ` [PATCH v7 00/29] " Daniel Vetter
2018-06-28 3:45 ` Stu Hsieh
2018-06-28 6:02 ` Daniel Vetter
2018-07-02 1:39 ` CK Hu
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