From: Corentin Labbe <clabbe@baylibre.com>
To: linux@armlinux.org.uk, mark.rutland@arm.com,
maxime.ripard@free-electrons.com, robh+dt@kernel.org,
tj@kernel.org, wens@csie.org
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@googlegroups.com, icenowy@aosc.io,
Corentin Labbe <clabbe@baylibre.com>
Subject: [PATCH v2 1/4] dt-bindings: add binding for Allwinner R40 SATA AHCI controller
Date: Mon, 9 Jul 2018 15:20:55 +0000 [thread overview]
Message-ID: <1531149658-27030-2-git-send-email-clabbe@baylibre.com> (raw)
In-Reply-To: <1531149658-27030-1-git-send-email-clabbe@baylibre.com>
From: Icenowy Zheng <icenowy@aosc.io>
The Allwinner R40 SoC contains a SATA AHCI controller like the one in
A10/A20 SoCs, however a reset control and two power supplies are added
to it.
Add a binding document for it.
As a dedicated binding document is needed now for the A10/A20/R40 AHCI
controller, drop the A10 compatible line from generic platform AHCI
controller binding document.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
.../devicetree/bindings/ata/ahci-platform.txt | 1 -
.../bindings/ata/allwinner,sun4i-a10-ahci.txt | 40 ++++++++++++++++++++++
2 files changed, 40 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt
diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt
index c760ecb81381..1bea4b5ef9fd 100644
--- a/Documentation/devicetree/bindings/ata/ahci-platform.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt
@@ -9,7 +9,6 @@ PHYs.
Required properties:
- compatible : compatible string, one of:
- - "allwinner,sun4i-a10-ahci"
- "brcm,iproc-ahci"
- "hisilicon,hisi-ahci"
- "cavium,octeon-7130-ahci"
diff --git a/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt
new file mode 100644
index 000000000000..0eea78c14ad3
--- /dev/null
+++ b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.txt
@@ -0,0 +1,40 @@
+Allwinner A10/A20/R40 SoC SATA AHCI Controller
+
+Required properties:
+- compatible : compatible string, one of:
+ - "allwinner,sun4i-a10-ahci"
+ - "allwinner,sun8i-r40-ahci"
+- interrupts : the SATA IRQ
+- reg : the register mapping
+- clocks : the clocks needed by SATA controller, usually contains
+ an AHB clock and a mod clock
+
+Optional properties:
+- target-supply : regulator for SATA target power
+
+Required properties for the following compatibles:
+ - "allwinner,sun8i-r40-ahci"
+- resets : the reset control needed by SATA controller
+- vdd1v2-supply : regulator for SATA controller's 1.2V VDD
+- vdd2v5-supply : regulator for SATA controller's 2.5V VDD
+
+
+Examples for A10:
+ ahci: sata@1c18000 {
+ compatible = "allwinner,sun4i-a10-ahci";
+ reg = <0x01c18000 0x1000>;
+ interrupts = <56>;
+ clocks = <&pll6 0>, <&ahb_gates 25>;
+ target-supply = <®_ahci_5v>;
+ };
+
+Examples for R40:
+ ahci: sata@1c18000 {
+ compatible = "allwinner,sun8i-r40-ahci";
+ reg = <0x01c18000 0x1000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_SATA>, <&ccu CLK_BUS_SATA>;
+ resets = <&ccu RST_BUS_SATA>;
+ vdd1v2-supply = <®_eldo3>;
+ vdd2v5-supply = <®_dldo4>;
+ };
--
2.16.4
next prev parent reply other threads:[~2018-07-09 15:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-09 15:20 [PATCH v2 0/4] sun8i: r40: add AHCI Corentin Labbe
2018-07-09 15:20 ` Corentin Labbe [this message]
2018-07-11 19:12 ` [PATCH v2 1/4] dt-bindings: add binding for Allwinner R40 SATA AHCI controller Rob Herring
2018-07-09 15:20 ` [PATCH v2 2/4] ata: ahci_sunxi: add support for R40 SATA controller Corentin Labbe
2018-07-09 15:20 ` [PATCH v2 3/4] ARM: dts: sun8i: r40: add sata node Corentin Labbe
2018-07-09 15:20 ` [PATCH v2 4/4] ARM: dts: sun8i: sun8i-r40-bananapi-m2-ultra: enable AHCI Corentin Labbe
2018-07-09 15:44 ` [PATCH v2 0/4] sun8i: r40: add AHCI Icenowy Zheng
2018-07-10 13:05 ` LABBE Corentin
2018-07-10 13:15 ` Icenowy Zheng
2018-07-10 12:29 ` Maxime Ripard
2018-07-10 12:32 ` Icenowy Zheng
2018-07-11 18:59 ` LABBE Corentin
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