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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, robert.walker@arm.com,
	mathieu.poirier@linaro.org, mike.leach@linaro.org,
	coresight@lists.linaro.org,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v2 01/10] coresight: Fix handling of sinks
Date: Tue, 17 Jul 2018 18:11:32 +0100	[thread overview]
Message-ID: <1531847501-22226-2-git-send-email-suzuki.poulose@arm.com> (raw)
In-Reply-To: <1531847501-22226-1-git-send-email-suzuki.poulose@arm.com>

The coresight components could be operated either in sysfs mode or in perf
mode. For some of the components, the mode of operation doesn't matter as
they simply relay the data to the next component in the trace path. But for
sinks, they need to be able to provide the trace data back to the user.
Thus we need to make sure that "mode" is handled appropriately. e.g,
the sysfs mode could have multiple sources driving the trace data, while
perf mode doesn't allow sharing the sink.

The coresight_enable_sink() however doesn't really allow this check to
trigger as it skips the "enable_sink" callback if the component is
already enabled, irrespective of the mode. This could cause mixing
of data from different modes or even same mode (in perf), if the
sources are different. Also, if we fail to enable the sink while
enabling a path (where sink is the first component enabled),
we could end up in disabling the components in the "entire"
path which were not enabled in this trial, causing disruptions
in the existing trace paths.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
 drivers/hwtracing/coresight/coresight.c | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c
index 3e07fd3..c0dabbd 100644
--- a/drivers/hwtracing/coresight/coresight.c
+++ b/drivers/hwtracing/coresight/coresight.c
@@ -132,12 +132,14 @@ static int coresight_enable_sink(struct coresight_device *csdev, u32 mode)
 {
 	int ret;
 
-	if (!csdev->enable) {
-		if (sink_ops(csdev)->enable) {
-			ret = sink_ops(csdev)->enable(csdev, mode);
-			if (ret)
-				return ret;
-		}
+	/*
+	 * We need to make sure the "new" session is compatible with the
+	 * existing "mode" of operation.
+	 */
+	if (sink_ops(csdev)->enable) {
+		ret = sink_ops(csdev)->enable(csdev, mode);
+		if (ret)
+			return ret;
 		csdev->enable = true;
 	}
 
@@ -339,8 +341,14 @@ int coresight_enable_path(struct list_head *path, u32 mode)
 		switch (type) {
 		case CORESIGHT_DEV_TYPE_SINK:
 			ret = coresight_enable_sink(csdev, mode);
+			/*
+			 * Sink is the first component turned on. If we
+			 * failed to enable the sink, there are no components
+			 * that need disabling. Disabling the path here
+			 * would mean we could disrupt an existing session.
+			 */
 			if (ret)
-				goto err;
+				goto out;
 			break;
 		case CORESIGHT_DEV_TYPE_SOURCE:
 			/* sources are enabled from either sysFS or Perf */
-- 
2.7.4


  reply	other threads:[~2018-07-17 17:12 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-17 17:11 [PATCH v2 00/10] coresight: perf: Support for tmc-etr backed buffers Suzuki K Poulose
2018-07-17 17:11 ` Suzuki K Poulose [this message]
2018-07-17 17:11 ` [PATCH v2 02/10] coresight: perf: Fix per cpu path management Suzuki K Poulose
2018-07-17 17:11 ` [PATCH v2 03/10] coresight: perf: Disable trace path upon source error Suzuki K Poulose
2018-07-17 17:11 ` [PATCH v2 04/10] coresight: tmc-etr: Handle driver mode specific ETR buffers Suzuki K Poulose
2018-07-17 17:11 ` [PATCH v2 05/10] coresight: tmc-etr: Relax collection of trace from sysfs mode Suzuki K Poulose
2018-07-17 17:11 ` [PATCH v2 06/10] coresight: Convert driver messages to dev_dbg Suzuki K Poulose
2018-07-17 17:11 ` [PATCH v2 07/10] coresight: perf: Remove reset_buffer call back for sinks Suzuki K Poulose
2018-07-17 17:11 ` [PATCH v2 08/10] coresight: perf: Add helper to retrieve sink configuration Suzuki K Poulose
2018-07-19 20:07   ` Mathieu Poirier
2018-07-20  8:43     ` Suzuki K Poulose
2018-07-23 16:50       ` Mathieu Poirier
2018-07-17 17:11 ` [PATCH v2 09/10] coresight: perf: Remove set_buffer call back Suzuki K Poulose
2018-07-19 20:36   ` Mathieu Poirier
2018-07-20  9:04     ` Suzuki K Poulose
2018-07-23 18:22       ` Mathieu Poirier
2018-07-23 22:28         ` Suzuki K Poulose
2018-07-24 20:08           ` Mathieu Poirier
2018-07-25  9:51             ` Suzuki K Poulose
2018-07-17 17:11 ` [PATCH v2 10/10] coresight: etm-perf: Add support for ETR backend Suzuki K Poulose
2018-07-19 19:59   ` Mathieu Poirier
2018-07-20  9:07     ` Suzuki K Poulose

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