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From: Ben Dooks <ben.dooks@codethink.co.uk>
To: linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: pdeschrijver@nvidia.com, pgaikwad@nvidia.com,
	jonathanh@nvidia.co, thierry.reding@gmail.com,
	linux-kernel@lists.codethink.co.uk,
	Ben Dooks <ben.dooks@codethink.co.uk>
Subject: [PATCH 5/8] clk: tegra: add mux-only clock option
Date: Fri, 20 Jul 2018 14:45:29 +0100	[thread overview]
Message-ID: <20180720134532.13148-6-ben.dooks@codethink.co.uk> (raw)
In-Reply-To: <20180720134532.13148-1-ben.dooks@codethink.co.uk>

If both the TEGRA_PERIPH_NO_DIV and TEGRA_PERIPH_NO_GATE are set
as the clock is a mux only, then the clock code fails as it does
not handle both these at the same time. Add support for this by
adding new ops with just the parent get/set.

This is required to add the 2d and 3d idle clocks.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
 drivers/clk/tegra/clk-periph.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index 9475c00b7cf9..0c377d2dac43 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -137,6 +137,11 @@ static const struct clk_ops tegra_clk_periph_no_gate_ops = {
 	.set_rate = clk_periph_set_rate,
 };
 
+static const struct clk_ops tegra_clk_periph_nodivgate_ops = {
+	.get_parent = clk_periph_get_parent,
+	.set_parent = clk_periph_set_parent,
+};
+
 static struct clk *_tegra_clk_register_periph(const char *name,
 			const char * const *parent_names, int num_parents,
 			struct tegra_clk_periph *periph,
@@ -147,8 +152,11 @@ static struct clk *_tegra_clk_register_periph(const char *name,
 	struct clk_init_data init;
 	const struct tegra_clk_periph_regs *bank;
 	bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV);
+	bool gate = !(periph->gate.flags & TEGRA_PERIPH_NO_GATE);
 
-	if (periph->gate.flags & TEGRA_PERIPH_NO_DIV) {
+	if (!div && !gate)
+		init.ops = &tegra_clk_periph_nodivgate_ops;
+	else if (periph->gate.flags & TEGRA_PERIPH_NO_DIV) {
 		flags |= CLK_SET_RATE_PARENT;
 		init.ops = &tegra_clk_periph_nodiv_ops;
 	} else if (periph->gate.flags & TEGRA_PERIPH_NO_GATE)
@@ -171,7 +179,7 @@ static struct clk *_tegra_clk_register_periph(const char *name,
 	periph->mux.reg = clk_base + offset;
 	periph->divider.reg = div ? (clk_base + offset) : NULL;
 	periph->gate.clk_base = clk_base;
-	periph->gate.regs = bank;
+	periph->gate.regs = gate ? bank : NULL;
 	periph->gate.enable_refcnt = periph_clk_enb_refcnt;
 
 	clk = clk_register(NULL, &periph->hw);
@@ -180,7 +188,7 @@ static struct clk *_tegra_clk_register_periph(const char *name,
 
 	periph->mux.hw.clk = clk;
 	periph->divider.hw.clk = div ? clk : NULL;
-	periph->gate.hw.clk = clk;
+	periph->gate.hw.clk = gate ? clk : NULL;
 
 	return clk;
 }
-- 
2.18.0


  parent reply	other threads:[~2018-07-20 13:46 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-20 13:45 tegra clock updates and fixes Ben Dooks
2018-07-20 13:45 ` [PATCH 1/8] clk: tegra: implement reset status callback Ben Dooks
2018-07-20 13:45 ` [PATCH 2/8] clk: tegra: host1x has fractional divider Ben Dooks
2018-07-23  8:50   ` Peter De Schrijver
2018-07-23  9:32     ` Ben Dooks
2018-07-23 11:12       ` Peter De Schrijver
2018-07-23 11:32         ` Ben Dooks
2018-07-20 13:45 ` [PATCH 3/8] clk: tegra: fix fractional clocks for VDI, VI, EPP, MPE, 2D and 3D Ben Dooks
2018-07-23  8:50   ` Peter De Schrijver
2018-07-20 13:45 ` [PATCH 4/8] clk: tegra: fix MUX_I2S_SPDIF macro Ben Dooks
2018-07-20 13:45 ` Ben Dooks [this message]
2018-07-20 13:45 ` [PATCH 6/8] clk: tegra30: add 2d and 3d idle clocks Ben Dooks
2018-07-22 11:55   ` Dmitry Osipenko
2018-07-23  8:28     ` Ben Dooks
2018-07-23 11:33       ` Dmitry Osipenko
2018-07-23 11:37         ` Ben Dooks
2018-07-23 13:05   ` Dmitry Osipenko
2018-07-24 11:31     ` Dmitry Osipenko
2018-07-24 12:32       ` Ben Dooks
2018-07-20 13:45 ` [PATCH 7/8] clk: tegra: replace warn on with single line Ben Dooks
2018-07-20 13:45 ` [PATCH 8/8] clk: tegra: show clock name in error from _calc_rate Ben Dooks
2018-07-26 13:32 ` [Linux-kernel] tegra clock updates and fixes Ben Dooks
2018-07-26 15:22   ` Stephen Boyd
2018-07-27  8:22     ` Ben Dooks

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