From: Paul Cercueil <paul@crapouillou.net>
To: Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
James Hogan <jhogan@kernel.org>,
Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: Mathieu Malaterre <malat@debian.org>,
Daniel Silsby <dansilsby@gmail.com>,
Paul Cercueil <paul@crapouillou.net>,
dmaengine@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mips@linux-mips.org
Subject: [PATCH v3 05/18] dmaengine: dma-jz4780: Use 4-word descriptors
Date: Sat, 21 Jul 2018 13:06:30 +0200 [thread overview]
Message-ID: <20180721110643.19624-6-paul@crapouillou.net> (raw)
In-Reply-To: <20180721110643.19624-1-paul@crapouillou.net>
The only information we use in the 8-word version of the hardware DMA
descriptor that is not present in the 4-word version is the transfer
type, aka. the ID of the source or recipient device.
Since the transfer type will never change for a DMA channel in use,
we can just set it once for all in the corresponding DMA register
before starting any transfer.
This has several benefits:
* the driver will handle twice as many hardware DMA descriptors;
* the driver is closer to support the JZ4740, which only supports 4-word
hardware DMA descriptors;
* the JZ4770 SoC needs the transfer type to be set in the corresponding
DMA register anyway, even if 8-word descriptors are in use.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
---
drivers/dma/dma-jz4780.c | 21 +++++++++------------
1 file changed, 9 insertions(+), 12 deletions(-)
v2: No change
v3: No change
diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
index 2f17a0fb1e5c..23e92d153919 100644
--- a/drivers/dma/dma-jz4780.c
+++ b/drivers/dma/dma-jz4780.c
@@ -95,17 +95,12 @@
* @dtc: transfer count (number of blocks of the transfer size specified in DCM
* to transfer) in the low 24 bits, offset of the next descriptor from the
* descriptor base address in the upper 8 bits.
- * @sd: target/source stride difference (in stride transfer mode).
- * @drt: request type
*/
struct jz4780_dma_hwdesc {
uint32_t dcm;
uint32_t dsa;
uint32_t dta;
uint32_t dtc;
- uint32_t sd;
- uint32_t drt;
- uint32_t reserved[2];
};
/* Size of allocations for hardware descriptor blocks. */
@@ -286,7 +281,6 @@ static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
desc->dcm = JZ_DMA_DCM_SAI;
desc->dsa = addr;
desc->dta = config->dst_addr;
- desc->drt = jzchan->transfer_type;
width = config->dst_addr_width;
maxburst = config->dst_maxburst;
@@ -294,7 +288,6 @@ static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
desc->dcm = JZ_DMA_DCM_DAI;
desc->dsa = config->src_addr;
desc->dta = addr;
- desc->drt = jzchan->transfer_type;
width = config->src_addr_width;
maxburst = config->src_maxburst;
@@ -439,9 +432,10 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy(
tsz = jz4780_dma_transfer_size(dest | src | len,
&jzchan->transfer_shift);
+ jzchan->transfer_type = JZ_DMA_DRT_AUTO;
+
desc->desc[0].dsa = src;
desc->desc[0].dta = dest;
- desc->desc[0].drt = JZ_DMA_DRT_AUTO;
desc->desc[0].dcm = JZ_DMA_DCM_TIE | JZ_DMA_DCM_SAI | JZ_DMA_DCM_DAI |
tsz << JZ_DMA_DCM_TSZ_SHIFT |
JZ_DMA_WIDTH_32_BIT << JZ_DMA_DCM_SP_SHIFT |
@@ -496,9 +490,12 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
(jzchan->curr_hwdesc + 1) % jzchan->desc->count;
}
- /* Use 8-word descriptors. */
- jz4780_dma_chn_writel(jzdma, jzchan->id,
- JZ_DMA_REG_DCS, JZ_DMA_DCS_DES8);
+ /* Use 4-word descriptors. */
+ jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS, 0);
+
+ /* Set transfer type. */
+ jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DRT,
+ jzchan->transfer_type);
/* Write descriptor address and initiate descriptor fetch. */
desc_phys = jzchan->desc->desc_phys +
@@ -508,7 +505,7 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
/* Enable the channel. */
jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS,
- JZ_DMA_DCS_DES8 | JZ_DMA_DCS_CTE);
+ JZ_DMA_DCS_CTE);
}
static void jz4780_dma_issue_pending(struct dma_chan *chan)
--
2.11.0
next prev parent reply other threads:[~2018-07-21 11:09 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-21 11:06 [PATCH v3 00/18] JZ4780 DMA patchset v3 Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 01/18] doc: dt-bindings: jz4780-dma: Update bindings to reflect driver changes Paul Cercueil
2018-07-24 23:35 ` Rob Herring
2018-07-30 21:13 ` Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 02/18] dmaengine: dma-jz4780: Return error if not probed from DT Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 03/18] dmaengine: dma-jz4780: Avoid hardcoding number of channels Paul Cercueil
2018-07-24 13:22 ` Vinod
2018-07-21 11:06 ` [PATCH v3 04/18] dmaengine: dma-jz4780: Separate chan/ctrl registers Paul Cercueil
2018-07-21 11:06 ` Paul Cercueil [this message]
2018-07-21 11:06 ` [PATCH v3 06/18] dmaengine: dma-jz4780: Don't depend on MACH_JZ4780 Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 07/18] dmaengine: dma-jz4780: Add support for the JZ4770 SoC Paul Cercueil
2018-07-24 13:32 ` Vinod
2018-07-24 15:04 ` Paul Cercueil
2018-07-24 16:01 ` Vinod
2018-08-04 9:02 ` Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 08/18] dmaengine: dma-jz4780: Add support for the JZ4740 SoC Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 09/18] dmaengine: dma-jz4780: Add support for the JZ4725B SoC Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 10/18] dmaengine: dma-jz4780: Enable Fast DMA to the AIC Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 11/18] dmaengine: dma-jz4780: Add missing residue DTC mask Paul Cercueil
2018-07-24 13:38 ` Vinod
2018-07-21 11:06 ` [PATCH v3 12/18] dmaengine: dma-jz4780: Simplify jz4780_dma_desc_residue() Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 13/18] dmaengine: dma-jz4780: Set DTCn register explicitly Paul Cercueil
2018-07-21 15:10 ` Randy Dunlap
2018-07-21 11:06 ` [PATCH v3 14/18] dmaengine: dma-jz4780: Further residue status fix Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 15/18] dmaengine: dma-jz4780: Use dma_set_residue() Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 16/18] MIPS: JZ4780: DTS: Update DMA node to match driver changes Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 17/18] MIPS: JZ4770: DTS: Add DMA nodes Paul Cercueil
2018-07-21 11:06 ` [PATCH v3 18/18] MIPS: JZ4740: " Paul Cercueil
2018-07-23 17:58 ` [PATCH v3 00/18] JZ4780 DMA patchset v3 Paul Burton
2018-07-24 11:09 ` Paul Cercueil
2018-07-24 13:11 ` Vinod
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