From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: p.zabel@pengutronix.de, mturquette@baylibre.com,
sboyd@kernel.org, afaerber@suse.de, robh+dt@kernel.org,
lee.jones@linaro.org, arnd@arndb.de
Cc: linux-clk@vger.kernel.org, liuwei@actions-semi.com,
mp-cs@actions-semi.com, 96boards@ucrobotics.com,
devicetree@vger.kernel.org, daniel.thompson@linaro.org,
amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, hzhang@ucrobotics.com,
bdong@ucrobotics.com, manivannanece23@gmail.com,
thomas.liau@actions-semi.com, jeff.chen@actions-semi.com,
pn@denx.de, edgar.righi@lsitec.org.br, sravanhome@gmail.com,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH v2 03/10] clk: actions: Add syscon support for Actions Semi Owl SoCs
Date: Wed, 1 Aug 2018 09:09:08 +0530 [thread overview]
Message-ID: <20180801033915.15880-4-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20180801033915.15880-1-manivannan.sadhasivam@linaro.org>
Since the clock and reset management units are sharing the same memory
map, convert the Owl common clock driver to support System Controller so
that the reset driver can reuse the same memory region.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/clk/actions/owl-common.c | 20 +++-----------------
1 file changed, 3 insertions(+), 17 deletions(-)
diff --git a/drivers/clk/actions/owl-common.c b/drivers/clk/actions/owl-common.c
index 61c1071b5180..080f980b2ec4 100644
--- a/drivers/clk/actions/owl-common.c
+++ b/drivers/clk/actions/owl-common.c
@@ -8,6 +8,7 @@
// Copyright (c) 2018 Linaro Ltd.
// Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+#include <linux/mfd/syscon.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
@@ -15,14 +16,6 @@
#include "owl-common.h"
-static const struct regmap_config owl_regmap_config = {
- .reg_bits = 32,
- .reg_stride = 4,
- .val_bits = 32,
- .max_register = 0x00cc,
- .fast_io = true,
-};
-
static void owl_clk_set_regmap(const struct owl_clk_desc *desc,
struct regmap *regmap)
{
@@ -41,18 +34,11 @@ static void owl_clk_set_regmap(const struct owl_clk_desc *desc,
int owl_clk_regmap_init(struct platform_device *pdev,
const struct owl_clk_desc *desc)
{
- void __iomem *base;
struct regmap *regmap;
- struct resource *res;
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(base))
- return PTR_ERR(base);
- regmap = devm_regmap_init_mmio(&pdev->dev, base, &owl_regmap_config);
+ regmap = syscon_node_to_regmap(of_get_parent(pdev->dev.of_node));
if (IS_ERR(regmap)) {
- pr_err("failed to init regmap\n");
+ dev_err(&pdev->dev, "failed to get regmap\n");
return PTR_ERR(regmap);
}
--
2.17.1
next prev parent reply other threads:[~2018-08-01 3:40 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-01 3:39 [PATCH v2 00/10] Add Reset Controller support for Actions Semi Owl SoCs Manivannan Sadhasivam
2018-08-01 3:39 ` [PATCH v2 01/10] dt-bindings: clock: Add syscon support to " Manivannan Sadhasivam
2018-08-07 17:48 ` Rob Herring
2018-08-01 3:39 ` [PATCH v2 02/10] arm64: dts: actions: Convert Owl SoCs clock-controller nodes to syscon Manivannan Sadhasivam
2018-08-01 3:39 ` Manivannan Sadhasivam [this message]
2018-08-01 3:39 ` [PATCH v2 04/10] dt-bindings: reset: Add Actions Semi S900 SoC RMU support Manivannan Sadhasivam
2018-08-01 3:39 ` [PATCH v2 05/10] dt-bindings: reset: Add Actions Semi S700 " Manivannan Sadhasivam
2018-08-01 3:39 ` [PATCH v2 06/10] arm64: dts: actions: Add RMU node for Actions Semi S900 SoC Manivannan Sadhasivam
2018-08-01 3:39 ` [PATCH v2 07/10] arm64: dts: actions: Add RMU node for Actions Semi S700 SoC Manivannan Sadhasivam
2018-08-01 3:39 ` [PATCH v2 08/10] reset: Add Actions Semi S900 SoC Reset Management Unit support Manivannan Sadhasivam
2018-08-01 3:39 ` [PATCH v2 09/10] reset: Add Actions Semi S700 " Manivannan Sadhasivam
2018-08-01 3:39 ` [PATCH v2 10/10] MAINTAINERS: Add entry for Actions Semi Owl SoCs Reset Management Unit Manivannan Sadhasivam
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